1 /* Generic Philips CL RC632 Routines
3 * (C) Harald Welte <laforge@gnumonks.org>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2
10 * as published by the Free Software Foundation
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
26 #include <sys/types.h>
28 #include <librfid/rfid.h>
29 #include <librfid/rfid_asic.h>
30 #include <librfid/rfid_asic_rc632.h>
31 #include <librfid/rfid_reader_cm5121.h>
32 #include <librfid/rfid_layer2_iso14443a.h>
33 #include <librfid/rfid_protocol_mifare_classic.h>
35 #include "rfid_iso14443_common.h"
37 //#include "rc632_14443a.h"
40 #define RC632_TMO_AUTH1 14000
42 #define ENTER() DEBUGP("entering\n")
43 struct rfid_asic rc632;
45 /* Register and FIFO Access functions */
47 rc632_reg_write(struct rfid_asic_handle *handle,
51 return handle->rath->rat->priv.rc632.fn.reg_write(handle->rath, reg, val);
55 rc632_reg_read(struct rfid_asic_handle *handle,
59 return handle->rath->rat->priv.rc632.fn.reg_read(handle->rath, reg, val);
63 rc632_fifo_write(struct rfid_asic_handle *handle,
68 return handle->rath->rat->priv.rc632.fn.fifo_write(handle->rath,
73 rc632_fifo_read(struct rfid_asic_handle *handle,
77 return handle->rath->rat->priv.rc632.fn.fifo_read(handle->rath, len, buf);
82 rc632_set_bits(struct rfid_asic_handle *handle,
89 ret = rc632_reg_read(handle, reg, &tmp);
93 /* if bits are already set, no need to set them again */
94 if ((tmp & val) == val)
97 return rc632_reg_write(handle, reg, (tmp|val)&0xff);
100 rc632_set_bit_mask(struct rfid_asic_handle *handle,
101 u_int8_t reg, u_int8_t mask, u_int8_t val)
106 ret = rc632_reg_read(handle, reg, &tmp);
110 /* if bits are already like we want them, abort */
111 if ((tmp & mask) == val)
114 return rc632_reg_write(handle, reg, (tmp & ~mask)|(val & mask));
118 rc632_clear_bits(struct rfid_asic_handle *handle,
125 ret = rc632_reg_read(handle, reg, &tmp);
127 DEBUGP("error during reg_read(%p, %d):%d\n",
131 /* if bits are already cleared, no need to clear them again */
132 if ((tmp & val) == 0)
135 return rc632_reg_write(handle, reg, (tmp & ~val)&0xff);
139 rc632_turn_on_rf(struct rfid_asic_handle *handle)
142 return rc632_set_bits(handle, RC632_REG_TX_CONTROL, 0x03);
146 rc632_turn_off_rf(struct rfid_asic_handle *handle)
149 return rc632_clear_bits(handle, RC632_REG_TX_CONTROL, 0x03);
153 rc632_power_up(struct rfid_asic_handle *handle)
156 return rc632_clear_bits(handle, RC632_REG_CONTROL,
157 RC632_CONTROL_POWERDOWN);
161 rc632_power_down(struct rfid_asic_handle *handle)
163 return rc632_set_bits(handle, RC632_REG_CONTROL,
164 RC632_CONTROL_POWERDOWN);
167 /* Stupid RC623 implementations don't evaluate interrupts but poll the
168 * command register for "status idle" */
170 rc632_wait_idle(struct rfid_asic_handle *handle, u_int64_t timeout)
174 #define USLEEP_PER_CYCLE 128
177 ret = rc632_reg_read(handle, RC632_REG_COMMAND, &cmd);
182 /* FIXME: read second time ?? */
188 rc632_reg_read(handle, RC632_REG_PRIMARY_STATUS, &foo);
190 rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &foo);
193 /* Abort after some timeout */
194 if (cycles > timeout*100/USLEEP_PER_CYCLE) {
199 usleep(USLEEP_PER_CYCLE);
206 rc632_transmit(struct rfid_asic_handle *handle,
212 const u_int8_t *cur_buf = buf;
220 ret = rc632_fifo_write(handle, cur_len, cur_buf, 0x03);
224 if (cur_buf == buf) {
225 /* only start transmit first time */
226 ret = rc632_reg_write(handle, RC632_REG_COMMAND,
233 if (cur_buf < buf + len) {
234 cur_len = buf - cur_buf;
242 return rc632_wait_idle(handle, timeout);
246 tcl_toggle_pcb(struct rfid_asic_handle *handle)
248 // FIXME: toggle something between 0x0a and 0x0b
253 rc632_transceive(struct rfid_asic_handle *handle,
254 const u_int8_t *tx_buf,
262 const u_int8_t *cur_tx_buf = tx_buf;
270 ret = rc632_fifo_write(handle, cur_tx_len, cur_tx_buf, 0x03);
274 if (cur_tx_buf == tx_buf) {
275 ret = rc632_reg_write(handle, RC632_REG_COMMAND,
276 RC632_CMD_TRANSCEIVE);
281 cur_tx_buf += cur_tx_len;
282 if (cur_tx_buf < tx_buf + tx_len) {
284 ret = rc632_reg_read(handle, RC632_REG_FIFO_LENGTH,
289 cur_tx_len = 64 - fifo_fill;
290 printf("refilling tx fifo with %u bytes\n", cur_tx_len);
294 } while (cur_tx_len);
297 tcl_toggle_pcb(handle);
299 ret = rc632_wait_idle(handle, timer);
303 ret = rc632_reg_read(handle, RC632_REG_FIFO_LENGTH, rx_len);
310 DEBUGP("rx_len == 0\n");
312 rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &tmp);
313 rc632_reg_read(handle, RC632_REG_CHANNEL_REDUNDANCY, &tmp);
318 return rc632_fifo_read(handle, *rx_len, rx_buf);
322 rc632_read_eeprom(struct rfid_asic_handle *handle)
324 u_int8_t recvbuf[60];
332 ret = rc632_fifo_write(handle, 3, sndbuf, 0x03);
336 ret = rc632_reg_write(handle, RC632_REG_COMMAND, RC632_CMD_READ_E2);
342 ret = rc632_fifo_read(handle, sizeof(recvbuf), recvbuf);
346 // FIXME: do something with eeprom contents
351 rc632_calc_crc16_from(struct rfid_asic_handle *handle)
353 u_int8_t sndbuf[2] = { 0x01, 0x02 };
354 u_int8_t crc_lsb = 0x00 , crc_msb = 0x00;
357 ret = rc632_reg_write(handle, RC632_REG_CRC_PRESET_LSB, 0x12);
361 ret = rc632_reg_write(handle, RC632_REG_CRC_PRESET_MSB, 0xe0);
365 ret = rc632_fifo_write(handle, sizeof(sndbuf), sndbuf, 3);
369 ret = rc632_reg_write(handle, RC632_REG_COMMAND, RC632_CMD_CALC_CRC);
373 usleep(10000); // FIXME: no checking for cmd completion?
375 ret = rc632_reg_read(handle, RC632_REG_CRC_RESULT_LSB, &crc_lsb);
379 ret = rc632_reg_read(handle, RC632_REG_CRC_RESULT_MSB, &crc_msb);
383 // FIXME: what to do with crc result?
389 rc632_register_dump(struct rfid_asic_handle *handle, u_int8_t *buf)
394 for (i = 0; i <= 0x3f; i++) {
395 ret = rc632_reg_read(handle, i, &buf[i]);
396 // do we want error checks?
403 /* generic FIFO access functions (if no more efficient ones provided by
404 * transport driver) */
409 // FIXME: implementation (not needed for CM 5121)
416 // FIXME: implementation (not neded for CM 5121)
421 rc632_init(struct rfid_asic_handle *ah)
425 /* switch off rf (make sure PICCs are reset at init time) */
426 ret = rc632_power_down(ah);
433 ret = rc632_power_up(ah);
437 /* disable register paging */
438 ret = rc632_reg_write(ah, 0x00, 0x00);
442 /* set some sane default values */
443 ret = rc632_reg_write(ah, 0x11, 0x5b);
448 ret = rc632_turn_on_rf(ah);
456 rc632_fini(struct rfid_asic_handle *ah)
461 ret = rc632_turn_off_rf(ah);
465 ret = rc632_power_down(ah);
472 struct rfid_asic_handle *
473 rc632_open(struct rfid_asic_transport_handle *th)
475 struct rfid_asic_handle *h;
477 h = malloc(sizeof(*h));
480 memset(h, 0, sizeof(*h));
485 h->mtu = h->mru = 40; /* FIXME */
487 if (rc632_init(h) < 0) {
496 rc632_close(struct rfid_asic_handle *h)
504 * Philips CL RC632 primitives for ISO 14443-A compliant PICC's
506 * (C) 2005 by Harald Welte <laforge@gnumonks.org>
511 rc632_iso14443a_init(struct rfid_asic_handle *handle)
515 // FIXME: some fifo work (drain fifo?)
517 /* flush fifo (our way) */
518 ret = rc632_reg_write(handle, RC632_REG_CONTROL, 0x01);
520 ret = rc632_reg_write(handle, RC632_REG_TX_CONTROL,
521 (RC632_TXCTRL_TX1_RF_EN |
522 RC632_TXCTRL_TX2_RF_EN |
523 RC632_TXCTRL_TX2_INV |
524 RC632_TXCTRL_FORCE_100_ASK |
525 RC632_TXCTRL_MOD_SRC_INT));
529 ret = rc632_reg_write(handle, RC632_REG_CW_CONDUCTANCE,
530 CM5121_CW_CONDUCTANCE);
534 /* Since FORCE_100_ASK is set (cf mc073930.pdf), this line may be left out? */
535 ret = rc632_reg_write(handle, RC632_REG_MOD_CONDUCTANCE,
536 CM5121_MOD_CONDUCTANCE);
540 ret = rc632_reg_write(handle, RC632_REG_CODER_CONTROL,
541 (RC632_CDRCTRL_TXCD_14443A |
542 RC632_CDRCTRL_RATE_106K));
546 ret = rc632_reg_write(handle, RC632_REG_MOD_WIDTH, 0x13);
550 ret = rc632_reg_write(handle, RC632_REG_MOD_WIDTH_SOF, 0x3f);
554 ret = rc632_reg_write(handle, RC632_REG_TYPE_B_FRAMING, 0x00);
558 ret = rc632_reg_write(handle, RC632_REG_RX_CONTROL1,
559 (RC632_RXCTRL1_GAIN_35DB |
560 RC632_RXCTRL1_ISO14443 |
561 RC632_RXCTRL1_SUBCP_8));
565 ret = rc632_reg_write(handle, RC632_REG_DECODER_CONTROL,
566 (RC632_DECCTRL_MANCHESTER |
567 RC632_DECCTRL_RXFR_14443A));
571 ret = rc632_reg_write(handle, RC632_REG_BIT_PHASE,
572 CM5121_14443A_BITPHASE);
576 ret = rc632_reg_write(handle, RC632_REG_RX_THRESHOLD,
577 CM5121_14443A_THRESHOLD);
581 ret = rc632_reg_write(handle, RC632_REG_BPSK_DEM_CONTROL, 0x00);
585 ret = rc632_reg_write(handle, RC632_REG_RX_CONTROL2,
586 (RC632_RXCTRL2_DECSRC_INT |
587 RC632_RXCTRL2_CLK_Q));
591 /* Omnikey proprietary driver has 0x03, but 0x06 is the default reset value ?!? */
592 ret = rc632_reg_write(handle, RC632_REG_RX_WAIT, 0x06);
596 ret = rc632_reg_write(handle, RC632_REG_CHANNEL_REDUNDANCY,
597 (RC632_CR_PARITY_ENABLE |
598 RC632_CR_PARITY_ODD));
602 ret = rc632_reg_write(handle, RC632_REG_CRC_PRESET_LSB, 0x63);
606 ret = rc632_reg_write(handle, RC632_REG_CRC_PRESET_MSB, 0x63);
614 rc632_iso14443a_fini(struct iso14443a_handle *handle_14443)
618 ret = rc632_turn_off_rf(handle);
628 /* issue a 14443-3 A PCD -> PICC command in a short frame, such as REQA, WUPA */
630 rc632_iso14443a_transceive_sf(struct rfid_asic_handle *handle,
632 struct iso14443a_atqa *atqa)
638 memset(atqa, 0, sizeof(atqa));
642 /* transfer only 7 bits of last byte in frame */
643 ret = rc632_reg_write(handle, RC632_REG_BIT_FRAMING, 0x07);
647 ret = rc632_clear_bits(handle, RC632_REG_CONTROL,
648 RC632_CONTROL_CRYPTO1_ON);
653 ret = rc632_reg_write(handle, RC632_REG_CHANNEL_REDUNDANCY,
654 (RC632_CR_PARITY_ENABLE |
655 RC632_CR_PARITY_ODD));
657 ret = rc632_clear_bits(handle, RC632_REG_CHANNEL_REDUNDANCY,
658 RC632_CR_RX_CRC_ENABLE|RC632_CR_TX_CRC_ENABLE);
664 ret = rc632_transceive(handle, tx_buf, sizeof(tx_buf),
665 (u_int8_t *)atqa, &rx_len, 0x32, 0);
667 DEBUGP("error during rc632_transceive()\n");
671 /* switch back to normal 8bit last byte */
672 ret = rc632_reg_write(handle, RC632_REG_BIT_FRAMING, 0x00);
677 DEBUGP("rx_len(%d) != 2\n", rx_len);
684 /* transceive regular frame */
686 rc632_iso14443ab_transceive(struct rfid_asic_handle *handle,
687 unsigned int frametype,
688 const u_int8_t *tx_buf, unsigned int tx_len,
689 u_int8_t *rx_buf, unsigned int *rx_len,
690 u_int64_t timeout, unsigned int flags)
693 u_int8_t rxl = *rx_len & 0xff;
694 u_int8_t channel_red;
696 memset(rx_buf, 0, *rx_len);
699 case RFID_14443A_FRAME_REGULAR:
700 case RFID_MIFARE_FRAME:
701 channel_red = RC632_CR_RX_CRC_ENABLE|RC632_CR_TX_CRC_ENABLE
702 |RC632_CR_PARITY_ENABLE|RC632_CR_PARITY_ODD;
704 case RFID_14443B_FRAME_REGULAR:
705 channel_red = RC632_CR_RX_CRC_ENABLE|RC632_CR_TX_CRC_ENABLE
709 case RFID_MIFARE_FRAME:
710 channel_red = RC632_CR_PARITY_ENABLE|RC632_CR_PARITY_ODD;
717 ret = rc632_reg_write(handle, RC632_REG_CHANNEL_REDUNDANCY,
722 ret = rc632_transceive(handle, tx_buf, tx_len, rx_buf, &rxl, 0x32, 0);
731 /* transceive anti collission bitframe */
733 rc632_iso14443a_transceive_acf(struct rfid_asic_handle *handle,
734 struct iso14443a_anticol_cmd *acf,
735 unsigned int *bit_of_col)
739 u_int8_t rx_len = sizeof(rx_buf);
740 u_int8_t rx_align = 0, tx_last_bits, tx_bytes;
743 *bit_of_col = ISO14443A_BITOFCOL_NONE;
744 memset(rx_buf, 0, sizeof(rx_buf));
746 /* disable mifare cryto */
747 ret = rc632_clear_bits(handle, RC632_REG_CONTROL,
748 RC632_CONTROL_CRYPTO1_ON);
752 /* disable CRC summing */
754 ret = rc632_reg_write(handle, RC632_REG_CHANNEL_REDUNDANCY,
755 (RC632_CR_PARITY_ENABLE |
756 RC632_CR_PARITY_ODD));
758 ret = rc632_clear_bits(handle, RC632_REG_CHANNEL_REDUNDANCY,
759 RC632_CR_TX_CRC_ENABLE|RC632_CR_TX_CRC_ENABLE);
764 tx_last_bits = acf->nvb & 0x0f; /* lower nibble indicates bits */
765 tx_bytes = acf->nvb >> 4;
768 rx_align = (tx_last_bits+1) % 8;/* rx frame complements tx */
771 //rx_align = 8 - tx_last_bits;/* rx frame complements tx */
773 /* set RxAlign and TxLastBits*/
774 ret = rc632_reg_write(handle, RC632_REG_BIT_FRAMING,
775 (rx_align << 4) | (tx_last_bits));
779 ret = rc632_transceive(handle, (u_int8_t *)acf, tx_bytes,
780 rx_buf, &rx_len, 0x32, 0);
784 /* bitwise-OR the two halves of the split byte */
785 acf->uid_bits[tx_bytes-2] = (
786 (acf->uid_bits[tx_bytes-2] & (0xff >> (8-tx_last_bits)))
789 memcpy(&acf->uid_bits[tx_bytes+1-2], &rx_buf[1], rx_len-1);
791 /* determine whether there was a collission */
792 ret = rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &error_flag);
796 if (error_flag & RC632_ERR_FLAG_COL_ERR) {
797 /* retrieve bit of collission */
798 ret = rc632_reg_read(handle, RC632_REG_COLL_POS, &boc);
802 /* bit of collission relative to start of part 1 of
803 * anticollision frame (!) */
804 *bit_of_col = 2*8 + boc;
811 RC632_RATE_106 = 0x00,
812 RC632_RATE_212 = 0x01,
813 RC632_RATE_424 = 0x02,
814 RC632_RATE_848 = 0x03,
818 u_int8_t subc_pulses;
820 u_int8_t rx_threshold;
821 u_int8_t bpsk_dem_ctrl;
829 static struct rx_config rx_configs[] = {
831 .subc_pulses = RC632_RXCTRL1_SUBCP_8,
832 .rx_coding = RC632_DECCTRL_MANCHESTER,
833 .rx_threshold = 0x88,
834 .bpsk_dem_ctrl = 0x00,
837 .subc_pulses = RC632_RXCTRL1_SUBCP_4,
838 .rx_coding = RC632_DECCTRL_BPSK,
839 .rx_threshold = 0x50,
840 .bpsk_dem_ctrl = 0x0c,
843 .subc_pulses = RC632_RXCTRL1_SUBCP_2,
844 .rx_coding = RC632_DECCTRL_BPSK,
845 .rx_threshold = 0x50,
846 .bpsk_dem_ctrl = 0x0c,
849 .subc_pulses = RC632_RXCTRL1_SUBCP_1,
850 .rx_coding = RC632_DECCTRL_BPSK,
851 .rx_threshold = 0x50,
852 .bpsk_dem_ctrl = 0x0c,
856 static struct tx_config tx_configs[] = {
858 .rate = RC632_CDRCTRL_RATE_106K,
862 .rate = RC632_CDRCTRL_RATE_212K,
866 .rate = RC632_CDRCTRL_RATE_424K,
870 .rate = RC632_CDRCTRL_RATE_848K,
875 static int rc632_iso14443a_set_speed(struct rfid_asic_handle *handle,
885 if (rate > ARRAY_SIZE(rx_configs))
888 rc = rc632_set_bit_mask(handle, RC632_REG_RX_CONTROL1,
889 RC632_RXCTRL1_SUBCP_MASK,
890 rx_configs[rate].subc_pulses);
894 rc = rc632_set_bit_mask(handle, RC632_REG_DECODER_CONTROL,
896 rx_configs[rate].rx_coding);
900 rc = rc632_reg_write(handle, RC632_REG_RX_THRESHOLD,
901 rx_configs[rate].rx_threshold);
905 if (rx_configs[rate].rx_coding == RC632_DECCTRL_BPSK) {
906 rc = rc632_reg_write(handle,
907 RC632_REG_BPSK_DEM_CONTROL,
908 rx_configs[rate].bpsk_dem_ctrl);
914 if (rate > ARRAY_SIZE(tx_configs))
917 rc = rc632_set_bit_mask(handle, RC632_REG_CODER_CONTROL,
918 RC632_CDRCTRL_RATE_MASK,
919 tx_configs[rate].rate);
923 rc = rc632_reg_write(handle, RC632_REG_MOD_WIDTH,
924 tx_configs[rate].mod_width);
932 static int rc632_iso14443b_init(struct rfid_asic_handle *handle)
936 // FIXME: some FIFO work
938 /* flush fifo (our way) */
939 ret = rc632_reg_write(handle, RC632_REG_CONTROL, 0x01);
943 ret = rc632_reg_write(handle, RC632_REG_TX_CONTROL,
944 (RC632_TXCTRL_TX1_RF_EN |
945 RC632_TXCTRL_TX2_RF_EN |
946 RC632_TXCTRL_TX2_INV |
947 RC632_TXCTRL_MOD_SRC_INT));
951 ret = rc632_reg_write(handle, RC632_REG_CW_CONDUCTANCE, 0x3f);
955 ret = rc632_reg_write(handle, RC632_REG_MOD_CONDUCTANCE, 0x04);
959 ret = rc632_reg_write(handle, RC632_REG_CODER_CONTROL,
960 (RC632_CDRCTRL_TXCD_NRZ |
961 RC632_CDRCTRL_RATE_14443B));
965 ret = rc632_reg_write(handle, RC632_REG_MOD_WIDTH, 0x13);
969 ret = rc632_reg_write(handle, RC632_REG_MOD_WIDTH_SOF, 0x3f);
973 ret = rc632_reg_write(handle, RC632_REG_TYPE_B_FRAMING,
974 (RC632_TBFRAMING_SOF_11L_3H |
975 (6 << RC632_TBFRAMING_SPACE_SHIFT) |
976 RC632_TBFRAMING_EOF_11));
980 ret = rc632_reg_write(handle, RC632_REG_RX_CONTROL1,
981 (RC632_RXCTRL1_GAIN_35DB |
982 RC632_RXCTRL1_ISO14443 |
983 RC632_RXCTRL1_SUBCP_8));
987 ret = rc632_reg_write(handle, RC632_REG_DECODER_CONTROL,
988 (RC632_DECCTRL_BPSK |
989 RC632_DECCTRL_RXFR_14443B));
993 ret = rc632_reg_write(handle, RC632_REG_BIT_PHASE,
994 CM5121_14443B_BITPHASE);
998 ret = rc632_reg_write(handle, RC632_REG_RX_THRESHOLD,
999 CM5121_14443B_THRESHOLD);
1003 ret = rc632_reg_write(handle, RC632_REG_BPSK_DEM_CONTROL,
1004 ((0x2 & RC632_BPSKD_TAUB_MASK)<<RC632_BPSKD_TAUB_SHIFT |
1005 (0x3 & RC632_BPSKD_TAUD_MASK)<<RC632_BPSKD_TAUD_SHIFT |
1006 RC632_BPSKD_FILTER_AMP_DETECT |
1007 RC632_BPSKD_NO_RX_EOF |
1008 RC632_BPSKD_NO_RX_EGT));
1012 ret = rc632_reg_write(handle, RC632_REG_RX_CONTROL2,
1013 (RC632_RXCTRL2_AUTO_PD |
1014 RC632_RXCTRL2_DECSRC_INT));
1018 ret = rc632_reg_write(handle, RC632_REG_RX_WAIT, 0x03);
1022 ret = rc632_reg_write(handle, RC632_REG_CHANNEL_REDUNDANCY,
1023 (RC632_CR_TX_CRC_ENABLE |
1024 RC632_CR_RX_CRC_ENABLE |
1029 ret = rc632_reg_write(handle, RC632_REG_CRC_PRESET_LSB, 0xff);
1033 ret = rc632_reg_write(handle, RC632_REG_CRC_PRESET_MSB, 0xff);
1041 rc632_iso15693_init(struct rfid_asic_handle *h)
1045 ret = rc632_reg_write(h, RC632_REG_TX_CONTROL,
1046 (RC632_TXCTRL_MOD_SRC_INT |
1047 RC632_TXCTRL_TX2_INV |
1048 RC632_TXCTRL_TX2_RF_EN |
1049 RC632_TXCTRL_TX1_RF_EN));
1053 ret = rc632_reg_write(h, RC632_REG_CW_CONDUCTANCE, 0x3f);
1057 ret = rc632_reg_write(h, RC632_REG_MOD_CONDUCTANCE, 0x03);
1061 ret = rc632_reg_write(h, RC632_REG_CODER_CONTROL,
1062 (RC632_CDRCTRL_RATE_15693 |
1067 ret = rc632_reg_write(h, RC632_REG_MOD_WIDTH, 0x3f);
1071 ret = rc632_reg_write(h, RC632_REG_MOD_WIDTH_SOF, 0x3f);
1075 ret = rc632_reg_write(h, RC632_REG_TYPE_B_FRAMING, 0x00);
1079 ret = rc632_reg_write(h, RC632_REG_RX_CONTROL1,
1080 (RC632_RXCTRL1_SUBCP_16 |
1081 RC632_RXCTRL1_ISO15693 |
1082 RC632_RXCTRL1_GAIN_35DB));
1086 ret = rc632_reg_write(h, RC632_REG_DECODER_CONTROL,
1087 (RC632_DECCTRL_RXFR_15693 |
1088 RC632_DECCTRL_RX_INVERT));
1092 ret = rc632_reg_write(h, RC632_REG_BIT_PHASE, 0xe0);
1096 ret = rc632_reg_write(h, RC632_REG_RX_THRESHOLD, 0xff);
1100 ret = rc632_reg_write(h, RC632_REG_BPSK_DEM_CONTROL, 0x00);
1104 ret = rc632_reg_write(h, RC632_REG_RX_CONTROL2,
1105 (RC632_RXCTRL2_AUTO_PD |
1106 RC632_RXCTRL2_DECSRC_INT));
1110 ret = rc632_reg_write(h, RC632_REG_CHANNEL_REDUNDANCY,
1112 RC632_CR_RX_CRC_ENABLE |
1113 RC632_CR_TX_CRC_ENABLE));
1117 ret = rc632_reg_write(h, RC632_REG_CRC_PRESET_LSB, 0xff);
1121 ret = rc632_reg_write(h, RC632_REG_CRC_PRESET_MSB, 0xff);
1129 rc632_iso15693_icode_init(struct rfid_asic_handle *h)
1133 ret = rc632_reg_write(h, RC632_REG_TX_CONTROL,
1134 (RC632_TXCTRL_MOD_SRC_INT |
1135 RC632_TXCTRL_TX2_INV |
1136 RC632_TXCTRL_TX2_RF_EN |
1137 RC632_TXCTRL_TX1_RF_EN));
1141 ret = rc632_reg_write(h, RC632_REG_CW_CONDUCTANCE, 0x3f);
1145 ret = rc632_reg_write(h, RC632_REG_MOD_CONDUCTANCE, 0x02);
1149 ret = rc632_reg_write(h, RC632_REG_CODER_CONTROL, 0x2c);
1153 ret = rc632_reg_write(h, RC632_REG_MOD_WIDTH, 0x3f);
1157 ret = rc632_reg_write(h, RC632_REG_MOD_WIDTH_SOF, 0x3f);
1161 ret = rc632_reg_write(h, RC632_REG_MOD_WIDTH_SOF, 0x3f);
1165 ret = rc632_reg_write(h, RC632_REG_TYPE_B_FRAMING, 0x00);
1169 ret = rc632_reg_write(h, RC632_REG_RX_CONTROL1, 0x8b); /* FIXME */
1173 ret = rc632_reg_write(h, RC632_REG_DECODER_CONTROL, 0x00);
1177 ret = rc632_reg_write(h, RC632_REG_BIT_PHASE, 0x52);
1181 ret = rc632_reg_write(h, RC632_REG_RX_THRESHOLD, 0x66);
1185 ret = rc632_reg_write(h, RC632_REG_BPSK_DEM_CONTROL, 0x00);
1189 ret = rc632_reg_write(h, RC632_REG_RX_CONTROL2,
1190 RC632_RXCTRL2_DECSRC_INT);
1194 ret = rc632_reg_write(h, RC632_REG_CHANNEL_REDUNDANCY,
1195 (RC632_CR_RX_CRC_ENABLE |
1196 RC632_CR_TX_CRC_ENABLE));
1197 ret = rc632_reg_write(h, RC632_REG_CRC_PRESET_LSB, 0xfe);
1201 ret = rc632_reg_write(h, RC632_REG_CRC_PRESET_MSB, 0xff);
1209 rc632_iso15693_icl_init(struct rfid_asic_handle *h)
1215 ret = rc632_reg_write(h, RC632_REG_TX_CONTROL,
1216 (RC632_TXCTRL_MOD_SRC_INT |
1217 RC632_TXCTRL_TX2_INV |
1218 RC632_TXCTRL_TX2_RF_EN |
1219 RC632_TXCTRL_TX1_RF_EN));
1223 ret = rc632_reg_write(h, RC632_REG_CW_CONDUCTANCE, 0x3f);
1227 ret = rc632_reg_write(h, RC632_REG_MOD_CONDUCTANCE, 0x11);
1231 ret = rc632_reg_write(h, RC632_REG_CODER_CONTROL,
1232 (RC632_CDRCTRL_RATE_15693 |
1233 RC632_CDRCTRL_TXCD_ICODE_STD |
1238 ret = rc632_reg_write(h, RC632_REG_MOD_WIDTH, 0x3f);
1242 ret = rc632_reg_write(h, RC632_REG_MOD_WIDTH_SOF, 0x3f);
1245 ret = rc632_reg_write(h, RC632_REG_RX_CONTROL1,
1246 (RC632_RXCTRL1_SUBCP_16|
1247 RC632_RXCTRL1_ISO15693|
1248 RC632_RXCTRL1_GAIN_35DB));
1251 ret = rc632_reg_write(h, RC632_REG_DECODER_CONTROL,
1252 (RC632_DECCTRL_RX_INVERT|
1253 RC632_DECCTRL_RXFR_15693));
1257 ret = rc632_reg_write(h, RC632_REG_BIT_PHASE, 0xbd);
1261 ret = rc632_reg_write(h, RC632_REG_RX_THRESHOLD, 0xff);
1265 ret = rc632_reg_write(h, RC632_REG_BPSK_DEM_CONTROL, 0x00);
1269 ret = rc632_reg_write(h, RC632_REG_RX_CONTROL2,
1270 RC632_RXCTRL2_DECSRC_INT);
1274 ret = rc632_reg_write(h, RC632_REG_CHANNEL_REDUNDANCY, 0x00);
1278 ret = rc632_reg_write(h, RC632_REG_CRC_PRESET_LSB, 0x12);
1282 ret = rc632_reg_write(h, RC632_REG_CRC_PRESET_MSB, 0xe0);
1289 struct mifare_authcmd {
1291 u_int8_t block_address;
1292 u_int32_t serno; /* lsb 1 2 msb */
1293 } __attribute__ ((packed));
1296 #define RFID_MIFARE_KEY_LEN 6
1297 #define RFID_MIFARE_KEY_CODED_LEN 12
1299 /* Transform crypto1 key from generic 6byte into rc632 specific 12byte */
1301 rc632_mifare_transform_key(const u_int8_t *key6, u_int8_t *key12)
1307 for (i = 0; i < RFID_MIFARE_KEY_LEN; i++) {
1308 ln = key6[i] & 0x0f;
1310 key12[i * 2 + 1] = (~ln << 4) | ln;
1311 key12[i * 2] = (~hn << 4) | hn;
1317 rc632_mifare_set_key(struct rfid_asic_handle *h, const u_int8_t *key)
1319 u_int8_t coded_key[RFID_MIFARE_KEY_CODED_LEN];
1323 ret = rc632_mifare_transform_key(key, coded_key);
1327 ret = rc632_fifo_write(h, RFID_MIFARE_KEY_CODED_LEN, coded_key, 0x03);
1331 ret = rc632_reg_write(h, RC632_REG_COMMAND, RC632_CMD_LOAD_KEY);
1335 ret = rc632_wait_idle(h, RC632_TMO_AUTH1);
1339 ret = rc632_reg_read(h, RC632_REG_ERROR_FLAG, ®);
1343 if (reg & RC632_ERR_FLAG_KEY_ERR)
1350 rc632_mifare_auth(struct rfid_asic_handle *h, u_int8_t cmd, u_int32_t serno,
1354 struct mifare_authcmd acmd;
1357 if (cmd != RFID_CMD_MIFARE_AUTH1A && cmd != RFID_CMD_MIFARE_AUTH1B)
1360 /* Initialize acmd */
1361 acmd.block_address = block & 0xff;
1362 acmd.auth_cmd = cmd;
1363 //acmd.serno = htonl(serno);
1367 ret = rc632_clear_bits(h, RC632_REG_CHANNEL_REDUNDANCY,
1368 RC632_CR_RX_CRC_ENABLE);
1372 /* Send Authent1 Command */
1373 ret = rc632_fifo_write(h, sizeof(acmd), (unsigned char *)&acmd, 0x03);
1377 ret = rc632_reg_write(h, RC632_REG_COMMAND, RC632_CMD_AUTHENT1);
1381 /* Wait until transmitter is idle */
1382 ret = rc632_wait_idle(h, RC632_TMO_AUTH1);
1386 ret = rc632_reg_read(h, RC632_REG_SECONDARY_STATUS, ®);
1393 ret = rc632_clear_bits(h, RC632_REG_CHANNEL_REDUNDANCY,
1394 RC632_CR_TX_CRC_ENABLE);
1398 /* Send Authent2 Command */
1399 ret = rc632_reg_write(h, RC632_REG_COMMAND, RC632_CMD_AUTHENT2);
1403 /* Wait until transmitter is idle */
1404 ret = rc632_wait_idle(h, RC632_TMO_AUTH1);
1408 /* Check whether authentication was successful */
1409 ret = rc632_reg_read(h, RC632_REG_CONTROL, ®);
1413 if (!(reg & RC632_CONTROL_CRYPTO1_ON))
1420 /* transceive regular frame */
1422 rc632_mifare_transceive(struct rfid_asic_handle *handle,
1423 const u_int8_t *tx_buf, unsigned int tx_len,
1424 u_int8_t *rx_buf, unsigned int *rx_len,
1425 u_int64_t timeout, unsigned int flags)
1428 u_int8_t rxl = *rx_len & 0xff;
1430 DEBUGP("entered\n");
1431 memset(rx_buf, 0, *rx_len);
1434 ret = rc632_reg_write(handle, RC632_REG_CHANNEL_REDUNDANCY,
1435 (RC632_CR_PARITY_ENABLE |
1436 RC632_CR_PARITY_ODD |
1437 RC632_CR_TX_CRC_ENABLE |
1438 RC632_CR_RX_CRC_ENABLE));
1440 ret = rc632_clear_bits(handle, RC632_REG_CHANNEL_REDUNDANCY,
1441 RC632_CR_RX_CRC_ENABLE|RC632_CR_TX_CRC_ENABLE);
1446 ret = rc632_transceive(handle, tx_buf, tx_len, rx_buf, &rxl, 0x32, 0);
1455 struct rfid_asic rc632 = {
1456 .name = "Philips CL RC632",
1457 .fc = ISO14443_FREQ_CARRIER,
1460 .power_up = &rc632_power_up,
1461 .power_down = &rc632_power_down,
1462 .turn_on_rf = &rc632_turn_on_rf,
1463 .turn_off_rf = &rc632_turn_off_rf,
1464 .transceive = &rc632_iso14443ab_transceive,
1466 .init = &rc632_iso14443a_init,
1467 .transceive_sf = &rc632_iso14443a_transceive_sf,
1468 .transceive_acf = &rc632_iso14443a_transceive_acf,
1469 .set_speed = &rc632_iso14443a_set_speed,
1472 .init = &rc632_iso14443b_init,
1475 .init = &rc632_iso15693_init,
1478 .setkey = &rc632_mifare_set_key,
1479 .auth = &rc632_mifare_auth,