https://blackmesalabs.wordpress.com/2016/10/24/sump2-96-msps-logic-analyzer-for-22/
[BML_sump2] / sump2 / source / top_pll.v
1 module top_pll(REFERENCECLK,\r
2                PLLOUTCORE,\r
3                PLLOUTGLOBAL,\r
4                RESET,\r
5                LOCK);\r
6 \r
7 input REFERENCECLK;\r
8 input RESET;    /* To initialize the simulation properly, the RESET signal (Active Low) must be asserted at the beginning of the simulation */ \r
9 output PLLOUTCORE;\r
10 output PLLOUTGLOBAL;\r
11 output LOCK;\r
12 \r
13 SB_PLL40_CORE top_pll_inst(.REFERENCECLK(REFERENCECLK),\r
14                            .PLLOUTCORE(PLLOUTCORE),\r
15                            .PLLOUTGLOBAL(PLLOUTGLOBAL),\r
16                            .EXTFEEDBACK(),\r
17                            .DYNAMICDELAY(),\r
18                            .RESETB(RESET),\r
19                            .BYPASS(1'b0),\r
20                            .LATCHINPUTVALUE(),\r
21                            .LOCK(LOCK),\r
22                            .SDI(),\r
23                            .SDO(),\r
24                            .SCLK());\r
25 \r
26 //\\ Fin=12, Fout=96;\r
27 defparam top_pll_inst.DIVR = 4'b0000;\r
28 defparam top_pll_inst.DIVF = 7'b0111111;\r
29 defparam top_pll_inst.DIVQ = 3'b011;\r
30 defparam top_pll_inst.FILTER_RANGE = 3'b001;\r
31 defparam top_pll_inst.FEEDBACK_PATH = "SIMPLE";\r
32 defparam top_pll_inst.DELAY_ADJUSTMENT_MODE_FEEDBACK = "FIXED";\r
33 defparam top_pll_inst.FDA_FEEDBACK = 4'b0000;\r
34 defparam top_pll_inst.DELAY_ADJUSTMENT_MODE_RELATIVE = "FIXED";\r
35 defparam top_pll_inst.FDA_RELATIVE = 4'b0000;\r
36 defparam top_pll_inst.SHIFTREG_DIV_MODE = 2'b00;\r
37 defparam top_pll_inst.PLLOUT_SELECT = "GENCLK";\r
38 defparam top_pll_inst.ENABLE_ICEGATE = 1'b0;\r
39 \r
40 endmodule\r