core: Add support for RAMPZ and refactor instructions
[simavr] / tests / atmega48_disabled_timer.c
1 /*
2  * avrtest.c
3  *
4  *  Created on: 1 Dec 2009
5  *      Author: jone
6  */
7
8 #include <avr/io.h>
9 #include <avr/interrupt.h>
10 #include <avr/sleep.h>
11
12 #include "avr_mcu_section.h"
13 AVR_MCU(F_CPU, "atmega48");
14
15 ISR(TIMER0_COMPA_vect)
16 {
17         TCCR0B = 0;
18         TCNT0 = 0;
19 }
20
21 int main(void)
22 {
23         // Set up timer0 - do not start yet
24         TCCR0A |= (1 << WGM01);                     // Configure timer 0 for CTC mode
25         TIMSK0 |= (1 << OCIE0A);                    // Enable CTC interrupt
26         OCR0A   = 0xAA;                             // CTC compare value
27
28         sei();                                      // Enable global interrupts
29
30         // here the interupts are enabled, but the interupt
31         // vector should not be called
32         while(1)
33                 sleep_mode();
34 }