projects
/
powerpc.git
/ blobdiff
commit
grep
author
committer
pickaxe
?
search:
re
summary
|
shortlog
|
log
|
commit
|
commitdiff
|
tree
raw
|
inline
| side by side
Merge branch 'for-linus' of master.kernel.org:/pub/scm/linux/kernel/git/roland/infiniband
[powerpc.git]
/
arch
/
i386
/
kernel
/
cpu
/
intel.c
diff --git
a/arch/i386/kernel/cpu/intel.c
b/arch/i386/kernel/cpu/intel.c
index
5a2e270
..
56fe265
100644
(file)
--- a/
arch/i386/kernel/cpu/intel.c
+++ b/
arch/i386/kernel/cpu/intel.c
@@
-107,7
+107,7
@@
static void __cpuinit init_intel(struct cpuinfo_x86 *c)
* Note that the workaround only should be initialized once...
*/
c->f00f_bug = 0;
* Note that the workaround only should be initialized once...
*/
c->f00f_bug = 0;
- if (
c->x86 == 5
) {
+ if (
!paravirt_enabled() && c->x86 == 5
) {
static int f00f_workaround_enabled = 0;
c->f00f_bug = 1;
static int f00f_workaround_enabled = 0;
c->f00f_bug = 1;
@@
-195,10
+195,18
@@
static void __cpuinit init_intel(struct cpuinfo_x86 *c)
if ((c->x86 == 0xf && c->x86_model >= 0x03) ||
(c->x86 == 0x6 && c->x86_model >= 0x0e))
set_bit(X86_FEATURE_CONSTANT_TSC, c->x86_capability);
if ((c->x86 == 0xf && c->x86_model >= 0x03) ||
(c->x86 == 0x6 && c->x86_model >= 0x0e))
set_bit(X86_FEATURE_CONSTANT_TSC, c->x86_capability);
-}
+ if (cpu_has_ds) {
+ unsigned int l1;
+ rdmsr(MSR_IA32_MISC_ENABLE, l1, l2);
+ if (!(l1 & (1<<11)))
+ set_bit(X86_FEATURE_BTS, c->x86_capability);
+ if (!(l1 & (1<<12)))
+ set_bit(X86_FEATURE_PEBS, c->x86_capability);
+ }
+}
-static unsigned int intel_size_cache(struct cpuinfo_x86 * c, unsigned int size)
+static unsigned int
__cpuinit
intel_size_cache(struct cpuinfo_x86 * c, unsigned int size)
{
/* Intel PIII Tualatin. This comes in two flavours.
* One has 256kb of cache, the other 512. We have no way
{
/* Intel PIII Tualatin. This comes in two flavours.
* One has 256kb of cache, the other 512. We have no way
@@
-263,7
+271,6
@@
static struct cpu_dev intel_cpu_dev __cpuinitdata = {
},
},
.c_init = init_intel,
},
},
.c_init = init_intel,
- .c_identify = generic_identify,
.c_size_cache = intel_size_cache,
};
.c_size_cache = intel_size_cache,
};