+//! Populates flash buffer in xdata.
+void cc_write_flash_buffer(u8 *data, u16 len){
+ cc_write_xdata(0xf000, data, len);
+}
+//! Populates flash buffer in xdata.
+void cc_write_xdata(u16 adr, u8 *data, u16 len){
+ u16 i;
+ for(i=0; i<len; i++){
+ cc_pokedatabyte(adr+i,
+ data[i]);
+ }
+}
+
+
+//32-bit words, 2KB pages
+//0x20 0x00 for CC2430, CC1110
+#define HIBYTE_WORDS_PER_FLASH_PAGE 0x02
+#define LOBYTE_WORDS_PER_FLASH_PAGE 0x00
+
+/** Ugh, this varies by chip.
+ 0x800 for CC2430
+ 0x400 for CC1110
+*/
+//#define FLASHPAGE_SIZE 0x400
+#define MAXFLASHPAGE_SIZE 0x800
+#define MINFLASHPAGE_SIZE 0x400
+
+
+//32 bit words on CC2430
+//16 bit words on CC1110
+//#define FLASH_WORD_SIZE 0x2
+u8 flash_word_size = 0; //0x02;
+
+
+/* Flash Write Timing
+ MHZ | FWT (0xAB)
+ 12 | 0x10
+ 13 | 0x11
+ 16 | 0x15
+ 24 | 0x20
+ 26 | 0x23 (IM ME)
+ 32 | 0x2A (Modula.si)
+*/
+//#define FWT 0x23
+
+const u8 flash_routine[] = {
+ //0:
+ //MOV FADDRH, #imm;
+ 0x75, 0xAD,
+ 0x00,//#imm=((address >> 8) / FLASH_WORD_SIZE) & 0x7E,
+
+ //0x75, 0xAB, 0x23, //Set FWT per clock
+ 0x75, 0xAC, 0x00, // MOV FADDRL, #00;
+ /* Erase page. */
+ 0x75, 0xAE, 0x01, // MOV FLC, #01H; // ERASE
+ // ; Wait for flash erase to complete
+ 0xE5, 0xAE, // eraseWaitLoop: MOV A, FLC;
+ 0x20, 0xE7, 0xFB, // JB ACC_BUSY, eraseWaitLoop;
+
+ /* End erase page. */
+ // ; Initialize the data pointer
+ 0x90, 0xF0, 0x00, // MOV DPTR, #0F000H;
+ // ; Outer loops
+ 0x7F, HIBYTE_WORDS_PER_FLASH_PAGE, // MOV R7, #imm;
+ 0x7E, LOBYTE_WORDS_PER_FLASH_PAGE, // MOV R6, #imm;
+ 0x75, 0xAE, 0x02, // MOV FLC, #02H; // WRITE
+ // ; Inner loops
+ //24:
+ 0x7D, 0xde /*FLASH_WORD_SIZE*/, // writeLoop: MOV R5, #imm;
+ 0xE0, // writeWordLoop: MOVX A, @DPTR;
+ 0xA3, // INC DPTR;
+ 0xF5, 0xAF, // MOV FWDATA, A;
+ 0xDD, 0xFA, // DJNZ R5, writeWordLoop;
+ // ; Wait for completion
+ 0xE5, 0xAE, // writeWaitLoop: MOV A, FLC;
+ 0x20, 0xE6, 0xFB, // JB ACC_SWBSY, writeWaitLoop;
+ 0xDE, 0xF1, // DJNZ R6, writeLoop;
+ 0xDF, 0xEF, // DJNZ R7, writeLoop;
+ // ; Done, fake a breakpoint
+ 0xA5 // DB 0xA5;
+};
+
+
+//! Copies flash buffer to flash.
+void cc_write_flash_page(u32 adr){
+ //Assumes that page has already been written to XDATA 0xF000
+ //debugstr("Flashing 2kb at 0xF000 to given adr.");
+
+ if(adr&(MINFLASHPAGE_SIZE-1)){
+ debugstr("Flash page address is not on a page boundary. Aborting.");
+ return;
+ }
+
+ if(flash_word_size!=2 && flash_word_size!=4){
+ debugstr("Flash word size is wrong, aborting write to");
+ debughex(adr);
+ while(1);
+ }
+
+ //Routine comes next
+ //WRITE_XDATA_MEMORY(IN: 0xF000 + FLASH_PAGE_SIZE, sizeof(routine), routine);
+ cc_write_xdata(0xF000+MAXFLASHPAGE_SIZE,
+ (u8*) flash_routine, sizeof(flash_routine));
+ //Patch routine's third byte with
+ //((address >> 8) / FLASH_WORD_SIZE) & 0x7E
+ cc_pokedatabyte(0xF000+MAXFLASHPAGE_SIZE+2,
+ ((adr>>8)/flash_word_size)&0x7E);
+ //Patch routine to define FLASH_WORD_SIZE
+ if(flash_routine[25]!=0xde)
+ debugstr("Ugly patching code failing in chipcon.c");
+ cc_pokedatabyte(0xF000+MAXFLASHPAGE_SIZE+25,
+ flash_word_size);
+
+ //debugstr("Wrote flash routine.");
+
+ //MOV MEMCTR, (bank * 16) + 1;
+ cmddata[0]=0x75;
+ cmddata[1]=0xc7;
+ cmddata[2]=0x51;
+ cc_debug_instr(3);
+ //debugstr("Loaded bank info.");
+
+ cc_set_pc(0xf000+MAXFLASHPAGE_SIZE);//execute code fragment
+ cc_resume();
+
+ //debugstr("Executing.");
+
+
+ while(!(cc_read_status()&CC_STATUS_CPUHALTED)){
+ led_toggle();//blink LED while flashing
+ }
+
+
+ //debugstr("Done flashing.");
+
+ led_off();
+}