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Add Chipcon CC2500 (and alike) SPI support + web pages. RX is not working yet.
[goodfet]
/
firmware
/
apps
/
chipcon
/
chipcon.c
diff --git
a/firmware/apps/chipcon/chipcon.c
b/firmware/apps/chipcon/chipcon.c
index
5785e2e
..
6a12362
100644
(file)
--- a/
firmware/apps/chipcon/chipcon.c
+++ b/
firmware/apps/chipcon/chipcon.c
@@
-61,10
+61,13
@@
app_t const chipcon_app = {
#define RST BIT6 // P3.7
#include <msp430_serial.h>
#define RST BIT6 // P3.7
#include <msp430_serial.h>
-#else // tilaunchpad
-#define RST BIT0
+
+
+//Normal pins.
+#else
+#define RST BIT0 // P5.0
#define dputs(s)
#define dputs(s)
-#endif
// ! tilaunchad
+#endif
#define MOSI BIT2
#define MISO BIT2
#define MOSI BIT2
#define MISO BIT2
@@
-75,7
+78,7
@@
app_t const chipcon_app = {
//Does it ever need to be?
#define CCSPEED 3
//#define CCSPEED 3
//Does it ever need to be?
#define CCSPEED 3
//#define CCSPEED 3
-//#define CCDELAY(x) delay(x)
+//#define CCDELAY(x) delay
_ms
(x)
#define CCDELAY(x)
#define SETMOSI SPIOUT|=MOSI
#define CCDELAY(x)
#define SETMOSI SPIOUT|=MOSI
@@
-94,8
+97,8
@@
app_t const chipcon_app = {
# define SETRST P3OUT|=RST
# define CLRRST P3OUT&=~RST
#else
# define SETRST P3OUT|=RST
# define CLRRST P3OUT&=~RST
#else
-# define SETRST P
3
OUT|=RST
-# define CLRRST P
3
OUT&=~RST
+# define SETRST P
5
OUT|=RST
+# define CLRRST P
5
OUT&=~RST
#endif
#define CCWRITE SPIDIR|=MOSI
#endif
#define CCWRITE SPIDIR|=MOSI
@@
-176,6
+179,7
@@
unsigned char cctrans8(unsigned char byte){
//Minor alterations.
for (bit = 0; bit < 8; bit++) {
//Minor alterations.
for (bit = 0; bit < 8; bit++) {
+ CCDELAY(CCSPEED>>2);
/* write MOSI on trailing edge of previous clock */
if (byte & 0x80)
SETMOSI;
/* write MOSI on trailing edge of previous clock */
if (byte & 0x80)
SETMOSI;