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[PATCH] PCI: msi abstractions and support for altix
[powerpc.git]
/
include
/
asm-i386
/
desc.h
diff --git
a/include/asm-i386/desc.h
b/include/asm-i386/desc.h
index
6df1a53
..
89b8b82
100644
(file)
--- a/
include/asm-i386/desc.h
+++ b/
include/asm-i386/desc.h
@@
-15,7
+15,6
@@
#include <asm/mmu.h>
extern struct desc_struct cpu_gdt_table[GDT_ENTRIES];
#include <asm/mmu.h>
extern struct desc_struct cpu_gdt_table[GDT_ENTRIES];
-DECLARE_PER_CPU(struct desc_struct, cpu_gdt_table[GDT_ENTRIES]);
DECLARE_PER_CPU(unsigned char, cpu_16bit_stack[CPU_16BIT_STACK_SIZE]);
DECLARE_PER_CPU(unsigned char, cpu_16bit_stack[CPU_16BIT_STACK_SIZE]);
@@
-25,7
+24,14
@@
struct Xgt_desc_struct {
unsigned short pad;
} __attribute__ ((packed));
unsigned short pad;
} __attribute__ ((packed));
-extern struct Xgt_desc_struct idt_descr, cpu_gdt_descr[NR_CPUS];
+extern struct Xgt_desc_struct idt_descr;
+DECLARE_PER_CPU(struct Xgt_desc_struct, cpu_gdt_descr);
+
+
+static inline struct desc_struct *get_cpu_gdt_table(unsigned int cpu)
+{
+ return (struct desc_struct *)per_cpu(cpu_gdt_descr, cpu).address;
+}
#define load_TR_desc() __asm__ __volatile__("ltr %w0"::"q" (GDT_ENTRY_TSS*8))
#define load_LDT_desc() __asm__ __volatile__("lldt %w0"::"q" (GDT_ENTRY_LDT*8))
#define load_TR_desc() __asm__ __volatile__("ltr %w0"::"q" (GDT_ENTRY_TSS*8))
#define load_LDT_desc() __asm__ __volatile__("lldt %w0"::"q" (GDT_ENTRY_LDT*8))
@@
-60,7
+66,7
@@
__asm__ __volatile__ ("movw %w3,0(%2)\n\t" \
static inline void __set_tss_desc(unsigned int cpu, unsigned int entry, void *addr)
{
static inline void __set_tss_desc(unsigned int cpu, unsigned int entry, void *addr)
{
- _set_tssldt_desc(&
per_cpu(cpu_gdt_table,
cpu)[entry], (int)addr,
+ _set_tssldt_desc(&
get_cpu_gdt_table(
cpu)[entry], (int)addr,
offsetof(struct tss_struct, __cacheline_filler) - 1, 0x89);
}
offsetof(struct tss_struct, __cacheline_filler) - 1, 0x89);
}
@@
-68,7
+74,7
@@
static inline void __set_tss_desc(unsigned int cpu, unsigned int entry, void *ad
static inline void set_ldt_desc(unsigned int cpu, void *addr, unsigned int size)
{
static inline void set_ldt_desc(unsigned int cpu, void *addr, unsigned int size)
{
- _set_tssldt_desc(&
per_cpu(cpu_gdt_table,
cpu)[GDT_ENTRY_LDT], (int)addr, ((size << 3)-1), 0x82);
+ _set_tssldt_desc(&
get_cpu_gdt_table(
cpu)[GDT_ENTRY_LDT], (int)addr, ((size << 3)-1), 0x82);
}
#define LDT_entry_a(info) \
}
#define LDT_entry_a(info) \
@@
-109,7
+115,7
@@
static inline void write_ldt_entry(void *ldt, int entry, __u32 entry_a, __u32 en
static inline void load_TLS(struct thread_struct *t, unsigned int cpu)
{
static inline void load_TLS(struct thread_struct *t, unsigned int cpu)
{
-#define C(i)
per_cpu(cpu_gdt_table,
cpu)[GDT_ENTRY_TLS_MIN + i] = t->tls_array[i]
+#define C(i)
get_cpu_gdt_table(
cpu)[GDT_ENTRY_TLS_MIN + i] = t->tls_array[i]
C(0); C(1); C(2);
#undef C
}
C(0); C(1); C(2);
#undef C
}