- // if the interupts are not used, still raised the UDRE and TXC flaga
- avr_raise_interupt(avr, &p->udrc);
- avr_raise_interupt(avr, &p->txc);
-
- static char buf[128];
- static int l = 0;
- buf[l++] = v < ' ' ? '.' : v;
- buf[l] = 0;
- if (v == '\n' || l == 127) {
- l = 0;
- printf("\e[32m%s\e[0m\n", buf);
+ if ( p->udrc.vector)
+ avr_regbit_clear(avr, p->udrc.raised);
+ avr_cycle_timer_register_usec(avr,
+ p->usec_per_byte, avr_uart_txc_raise, p); // should be uart speed dependent
+
+ if (p->flags & AVR_UART_FLAG_STDIO) {
+ const int maxsize = 256;
+ if (!p->stdio_out)
+ p->stdio_out = malloc(maxsize);
+ p->stdio_out[p->stdio_len++] = v < ' ' ? '.' : v;
+ p->stdio_out[p->stdio_len] = 0;
+ if (v == '\n' || p->stdio_len == maxsize) {
+ p->stdio_len = 0;
+ AVR_LOG(avr, LOG_TRACE, FONT_GREEN "%s\n" FONT_DEFAULT, p->stdio_out);
+ }
+ }
+ TRACE(printf("UDR%c(%02x) = %02x\n", p->name, addr, v);)
+ // tell other modules we are "outputting" a byte
+ if (avr_regbit_get(avr, p->txen))
+ avr_raise_irq(p->io.irq + UART_IRQ_OUTPUT, v);
+ }
+ if (p->udrc.vector && addr == p->udrc.enable.reg) {
+ /*
+ * If enabling the UDRC interrupt, raise it immediately if FIFO is empty
+ */
+ uint8_t udrce = avr_regbit_get(avr, p->udrc.enable);
+ avr_core_watch_write(avr, addr, v);
+ uint8_t nudrce = avr_regbit_get(avr, p->udrc.enable);
+ if (!udrce && nudrce) {
+ // if the FIDO is not empty (clear timer is flying) we don't
+ // need to raise the interrupt, it will happen when the timer
+ // is fired.
+ if (avr_cycle_timer_status(avr, avr_uart_txc_raise, p) == 0)
+ avr_raise_interrupt(avr, &p->udrc);