[MIPS] MT: Fix setting of XTC.
[powerpc.git] / arch / arm / mach-integrator / integrator_cp.c
index aa34c58..678b6ba 100644 (file)
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/list.h>
-#include <linux/device.h>
+#include <linux/platform_device.h>
 #include <linux/dma-mapping.h>
 #include <linux/slab.h>
 #include <linux/string.h>
 #include <linux/sysdev.h>
+#include <linux/amba/bus.h>
+#include <linux/amba/kmi.h>
+#include <linux/amba/clcd.h>
 
 #include <asm/hardware.h>
 #include <asm/io.h>
 #include <asm/irq.h>
 #include <asm/setup.h>
 #include <asm/mach-types.h>
-#include <asm/hardware/amba.h>
-#include <asm/hardware/amba_kmi.h>
-#include <asm/hardware/amba_clcd.h>
 #include <asm/hardware/icst525.h>
 
 #include <asm/arch/cm.h>
@@ -156,7 +156,8 @@ static void cic_unmask_irq(unsigned int irq)
        cic_writel(1 << irq, INTCP_VA_CIC_BASE + IRQ_ENABLE_SET);
 }
 
-static struct irqchip cic_chip = {
+static struct irq_chip cic_chip = {
+       .name   = "CIC",
        .ack    = cic_mask_irq,
        .mask   = cic_mask_irq,
        .unmask = cic_unmask_irq,
@@ -174,7 +175,8 @@ static void pic_unmask_irq(unsigned int irq)
        pic_writel(1 << irq, INTCP_VA_PIC_BASE + IRQ_ENABLE_SET);
 }
 
-static struct irqchip pic_chip = {
+static struct irq_chip pic_chip = {
+       .name   = "PIC",
        .ack    = pic_mask_irq,
        .mask   = pic_mask_irq,
        .unmask = pic_unmask_irq,
@@ -192,7 +194,8 @@ static void sic_unmask_irq(unsigned int irq)
        sic_writel(1 << irq, INTCP_VA_SIC_BASE + IRQ_ENABLE_SET);
 }
 
-static struct irqchip sic_chip = {
+static struct irq_chip sic_chip = {
+       .name   = "SIC",
        .ack    = sic_mask_irq,
        .mask   = sic_mask_irq,
        .unmask = sic_unmask_irq,
@@ -232,8 +235,6 @@ static void __init intcp_init_irq(void)
        for (i = IRQ_PIC_START; i <= IRQ_PIC_END; i++) {
                if (i == 11)
                        i = 22;
-               if (i == IRQ_CP_CPPLDINT)
-                       i++;
                if (i == 29)
                        break;
                set_irq_chip(i, &pic_chip);
@@ -259,8 +260,7 @@ static void __init intcp_init_irq(void)
                set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
        }
 
-       set_irq_handler(IRQ_CP_CPPLDINT, sic_handle_irq);
-       pic_unmask_irq(IRQ_CP_CPPLDINT);
+       set_irq_chained_handler(IRQ_CP_CPPLDINT, sic_handle_irq);
 }
 
 /*
@@ -469,7 +469,9 @@ static void cp_clcd_enable(struct clcd_fb *fb)
        if (fb->fb.var.bits_per_pixel <= 8)
                val = CM_CTRL_LCDMUXSEL_VGA_8421BPP;
        else if (fb->fb.var.bits_per_pixel <= 16)
-               val = CM_CTRL_LCDMUXSEL_VGA_16BPP;
+               val = CM_CTRL_LCDMUXSEL_VGA_16BPP
+                       | CM_CTRL_LCDEN0 | CM_CTRL_LCDEN1
+                       | CM_CTRL_STATIC1 | CM_CTRL_STATIC2;
        else
                val = 0; /* no idea for this, don't trust the docs */
 
@@ -578,7 +580,6 @@ static struct sys_timer cp_timer = {
 
 MACHINE_START(CINTEGRATOR, "ARM-IntegratorCP")
        /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
-       .phys_ram       = 0x00000000,
        .phys_io        = 0x16000000,
        .io_pg_offst    = ((0xf1600000) >> 18) & 0xfffc,
        .boot_params    = 0x00000100,