*************************************************************************/
static void ixdp2x01_irq_mask(unsigned int irq)
{
- ixp2000_reg_write(IXDP2X01_INT_MASK_SET_REG,
+ ixp2000_reg_wrb(IXDP2X01_INT_MASK_SET_REG,
IXP2000_BOARD_IRQ_MASK(irq));
}
/* Mask all interrupts from CPLD, disable simulation */
ixp2000_reg_write(IXDP2X01_INT_MASK_SET_REG, 0xffffffff);
- ixp2000_reg_write(IXDP2X01_INT_SIM_REG, 0);
+ ixp2000_reg_wrb(IXDP2X01_INT_SIM_REG, 0);
for (irq = NR_IXP2000_IRQS; irq < NR_IXDP2X01_IRQS; irq++) {
if (irq & valid_irq_mask) {
{
ixp2000_reg_write(IXP2000_PCI_ADDR_EXT, 0x00000000);
ixp2000_pci_preinit();
+ pcibios_setup("firmware");
}
#define DEVPIN(dev, pin) ((pin) | ((dev) << 3))
{
sys->mem_offset = 0xe0000000;
- if (machine_is_ixdp2801())
+ if (machine_is_ixdp2801() || machine_is_ixdp28x5())
sys->mem_offset -= ((*IXP2000_PCI_ADDR_EXT & 0xE000) << 16);
return ixp2000_pci_setup(nr, sys);
int __init ixdp2x01_pci_init(void)
{
+ if (machine_is_ixdp2401() || machine_is_ixdp2801() ||\
+ machine_is_ixdp28x5())
+ pci_common_init(&ixdp2x01_pci);
- pci_common_init(&ixdp2x01_pci);
return 0;
}
static unsigned long ixdp2x01_flash_bank_setup(unsigned long ofs)
{
- ixp2000_reg_write(IXDP2X01_CPLD_FLASH_REG,
+ ixp2000_reg_wrb(IXDP2X01_CPLD_FLASH_REG,
((ofs >> IXDP2X01_FLASH_WINDOW_BITS) | IXDP2X01_CPLD_FLASH_INTERN));
return (ofs & IXDP2X01_FLASH_WINDOW_MASK);
}
static void __init ixdp2x01_init_machine(void)
{
- ixp2000_reg_write(IXDP2X01_CPLD_FLASH_REG,
+ ixp2000_reg_wrb(IXDP2X01_CPLD_FLASH_REG,
(IXDP2X01_CPLD_FLASH_BANK_MASK | IXDP2X01_CPLD_FLASH_INTERN));
ixdp2x01_flash_data.nr_banks =
#ifdef CONFIG_ARCH_IXDP2401
MACHINE_START(IXDP2401, "Intel IXDP2401 Development Platform")
/* Maintainer: MontaVista Software, Inc. */
- .phys_ram = 0x00000000,
.phys_io = IXP2000_UART_PHYS_BASE,
.io_pg_offst = ((IXP2000_UART_VIRT_BASE) >> 18) & 0xfffc,
.boot_params = 0x00000100,
#ifdef CONFIG_ARCH_IXDP2801
MACHINE_START(IXDP2801, "Intel IXDP2801 Development Platform")
/* Maintainer: MontaVista Software, Inc. */
- .phys_ram = 0x00000000,
+ .phys_io = IXP2000_UART_PHYS_BASE,
+ .io_pg_offst = ((IXP2000_UART_VIRT_BASE) >> 18) & 0xfffc,
+ .boot_params = 0x00000100,
+ .map_io = ixdp2x01_map_io,
+ .init_irq = ixdp2x01_init_irq,
+ .timer = &ixdp2x01_timer,
+ .init_machine = ixdp2x01_init_machine,
+MACHINE_END
+
+/*
+ * IXDP28x5 is basically an IXDP2801 with a different CPU but Intel
+ * changed the machine ID in the bootloader
+ */
+MACHINE_START(IXDP28X5, "Intel IXDP2805/2855 Development Platform")
+ /* Maintainer: MontaVista Software, Inc. */
.phys_io = IXP2000_UART_PHYS_BASE,
.io_pg_offst = ((IXP2000_UART_VIRT_BASE) >> 18) & 0xfffc,
.boot_params = 0x00000100,