[ARM] 3499/1: Fix VFP FPSCR corruption for double exception case

[powerpc.git] / arch / arm / mach-pxa / time.c

diff --git a/arch/arm/mach-pxa/time.c b/arch/arm/mach-pxa/time.c
index 72b15e9..b9b2057 100644 (file)
--- a/arch/arm/mach-pxa/time.c
+++ b/arch/arm/mach-pxa/time.c
@@ -91,9 +91,10 @@ pxa_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
 
        /* Loop until we get ahead of the free running timer.
         * This ensures an exact clock tick count and time accuracy.
-        * IRQs are disabled inside the loop to ensure coherence between
-        * lost_ticks (updated in do_timer()) and the match reg value, so we
-        * can use do_gettimeofday() from interrupt handlers.
+        * Since IRQs are disabled at this point, coherence between
+        * lost_ticks(updated in do_timer()) and the match reg value is
+        * ensured, hence we can use do_gettimeofday() from interrupt
+        * handlers.
         *
         * HACK ALERT: it seems that the PXA timer regs aren't updated right
         * away in all cases when a write occurs.  We therefore compare with
@@ -131,11 +132,13 @@ static void __init pxa_timer_init(void)
        tv.tv_sec = pxa_get_rtc_time();
        do_settimeofday(&tv);
 
-       OSMR0 = 0;              /* set initial match at 0 */
+       OIER = 0;               /* disable any timer interrupts */
+       OSCR = LATCH*2;         /* push OSCR out of the way */
+       OSMR0 = LATCH;          /* set initial match */
        OSSR = 0xf;             /* clear status on all timers */
        setup_irq(IRQ_OST0, &pxa_timer_irq);
-       OIER |= OIER_E0;        /* enable match on timer 0 to cause interrupts */
-       OSCR = 0;               /* initialize free-running timer, force first match */
+       OIER = OIER_E0;         /* enable match on timer 0 to cause interrupts */
+       OSCR = 0;               /* initialize free-running timer */
 }
 
 #ifdef CONFIG_NO_IDLE_HZ