[POWERPC] of_detach_node()'s device node argument cannot be const

[powerpc.git] / arch / mips / Kconfig

diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 823a628..1e3aecc 100644 (file)
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -117,9 +117,9 @@ config MACH_JAZZ
        select ARC32
        select ARCH_MAY_HAVE_PC_FDC
        select GENERIC_ISA_DMA
-       select I8253
        select I8259
        select ISA
+       select PCSPEAKER
        select SYS_HAS_CPU_R4X00
        select SYS_SUPPORTS_32BIT_KERNEL
        select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
@@ -131,20 +131,6 @@ config MACH_JAZZ
         Members include the Acer PICA, MIPS Magnum 4000, MIPS Millenium and
         Olivetti M700-10 workstations.
 
-config LASAT
-       bool "LASAT Networks platforms"
-       select DMA_NONCOHERENT
-       select SYS_HAS_EARLY_PRINTK
-       select HW_HAS_PCI
-       select PCI_GT64XXX_PCI0
-       select MIPS_NILE4
-       select R5000_CPU_SCACHE
-       select SYS_HAS_CPU_R5000
-       select SYS_SUPPORTS_32BIT_KERNEL
-       select SYS_SUPPORTS_64BIT_KERNEL if BROKEN
-       select SYS_SUPPORTS_LITTLE_ENDIAN
-       select GENERIC_HARDIRQS_NO__DO_IRQ
-
 config MIPS_ATLAS
        bool "MIPS Atlas board"
        select BOOT_ELF32
@@ -280,25 +266,6 @@ config MOMENCO_OCELOT
          The Ocelot is a MIPS-based Single Board Computer (SBC) made by
          Momentum Computer <http://www.momenco.com/>.
 
-config MOMENCO_OCELOT_3
-       bool "Momentum Ocelot-3 board"
-       select BOOT_ELF32
-       select DMA_NONCOHERENT
-       select HW_HAS_PCI
-       select IRQ_CPU
-       select IRQ_CPU_RM7K
-       select IRQ_MV64340
-       select PCI_MARVELL
-       select RM7000_CPU_SCACHE
-       select SWAP_IO_SPACE
-       select SYS_HAS_CPU_RM9000
-       select SYS_SUPPORTS_32BIT_KERNEL
-       select SYS_SUPPORTS_64BIT_KERNEL
-       select SYS_SUPPORTS_BIG_ENDIAN
-       help
-         The Ocelot-3 is based off Discovery III System Controller and
-         PMC-Sierra Rm79000 core.
-
 config PNX8550_JBS
        bool "Philips PNX8550 based JBS board"
        select PNX8550
@@ -380,9 +347,9 @@ config QEMU
        select DMA_COHERENT
        select GENERIC_ISA_DMA
        select HAVE_STD_PC_SERIAL_PORT
-       select I8253
        select I8259
        select ISA
+       select PCSPEAKER
        select SWAP_IO_SPACE
        select SYS_HAS_CPU_MIPS32_R1
        select SYS_SUPPORTS_32BIT_KERNEL
@@ -595,9 +562,9 @@ config SNI_RM
        select HW_HAS_EISA
        select HW_HAS_PCI
        select IRQ_CPU
-       select I8253
        select I8259
        select ISA
+       select PCSPEAKER
        select SWAP_IO_SPACE if CPU_BIG_ENDIAN
        select SYS_HAS_CPU_R4X00
        select SYS_HAS_CPU_R5000
@@ -670,7 +637,6 @@ endchoice
 source "arch/mips/au1000/Kconfig"
 source "arch/mips/ddb5xxx/Kconfig"
 source "arch/mips/jazz/Kconfig"
-source "arch/mips/lasat/Kconfig"
 source "arch/mips/pmc-sierra/Kconfig"
 source "arch/mips/sgi-ip27/Kconfig"
 source "arch/mips/sibyte/Kconfig"
@@ -779,9 +745,6 @@ config MIPS_BONITO64
 config MIPS_MSC
        bool
 
-config MIPS_NILE4
-       bool
-
 config MIPS_DISABLE_OBSOLETE_IDE
        bool
 
@@ -844,9 +807,6 @@ config IRQ_MSP_SLP
 config IRQ_MSP_CIC
        bool
 
-config IRQ_MV64340
-       bool
-
 config DDB5XXX_COMMON
        bool
        select SYS_SUPPORTS_KGDB
@@ -868,9 +828,6 @@ config MIPS_RM9122
        bool
        select SERIAL_RM9000
 
-config PCI_MARVELL
-       bool
-
 config PNX8550
        bool
        select SOC_PNX8550
@@ -1233,8 +1190,19 @@ config SYS_HAS_CPU_RM9000
 config SYS_HAS_CPU_SB1
        bool
 
+#
+# CPU may reorder R->R, R->W, W->R, W->W
+# Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC
+#
 config WEAK_ORDERING
        bool
+
+#
+# CPU may reorder reads and writes beyond LL/SC
+# CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC
+#
+config WEAK_REORDERING_BEYOND_LLSC
+       bool
 endmenu
 
 #
@@ -1447,6 +1415,19 @@ config MIPS_MT_SMTC_INSTANT_REPLAY
          it off), but ensures that IPIs are handled promptly even under
          heavy I/O interrupt load.
 
+config MIPS_MT_SMTC_IM_BACKSTOP
+       bool "Use per-TC register bits as backstop for inhibited IM bits"
+       depends on MIPS_MT_SMTC
+       default y
+       help
+         To support multiple TC microthreads acting as "CPUs" within
+         a VPE, VPE-wide interrupt mask bits must be specially manipulated
+         during interrupt handling. To support legacy drivers and interrupt
+         controller management code, SMTC has a "backstop" to track and
+         if necessary restore the interrupt mask. This has some performance
+         impact on interrupt service overhead. Disable it only if you know
+         what you are doing.
+
 config MIPS_VPE_LOADER_TOM
        bool "Load VPE program into memory hidden from linux"
        depends on MIPS_VPE_LOADER
@@ -1894,7 +1875,7 @@ config MMU
        bool
        default y
 
-config I8253
+config PCSPEAKER
        bool
 
 source "drivers/pcmcia/Kconfig"