PNX8550 uses a MIPS32-like processor core, not R4xx0.

[powerpc.git] / arch / mips / kernel / cpu-probe.c

diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index 72c580d..a263fb7 100644 (file)
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -612,7 +612,7 @@ static inline void cpu_probe_sibyte(struct cpuinfo_mips *c)
         * cache code which eventually will be folded into c-r4k.c.  Until
         * then we pretend it's got it's own cache architecture.
         */
-       c->options &= MIPS_CPU_4K_CACHE;
+       c->options &= ~MIPS_CPU_4K_CACHE;
        c->options |= MIPS_CPU_SB1_CACHE;
 
        switch (c->processor_id & 0xff00) {
@@ -623,6 +623,9 @@ static inline void cpu_probe_sibyte(struct cpuinfo_mips *c)
                c->options &= ~(MIPS_CPU_FPU | MIPS_CPU_32FPR);
 #endif
                break;
+       case PRID_IMP_SB1A:
+               c->cputype = CPU_SB1A;
+               break;
        }
 }