Detect the 4KEcR2 and for now detect handle it like the 4KEc.

[powerpc.git] / arch / mips / kernel / cpu-probe.c

diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index 7685f8b..ce2966e 100644 (file)
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -51,29 +51,26 @@ static void r4k_wait(void)
                ".set\tmips0");
 }
 
-/*
- * The Au1xxx wait is available only if we run CONFIG_PM and
- * the timer setup found we had a 32KHz counter available.
- * There are still problems with functions that may call au1k_wait
- * directly, but that will be discovered pretty quickly.
- */
-extern void (*au1k_wait_ptr)(void);
-
-void au1k_wait(void)
+/* The Au1xxx wait is available only if using 32khz counter or
+ * external timer source, but specifically not CP0 Counter. */
+int allow_au1k_wait;
+static void au1k_wait(void)
 {
-#ifdef CONFIG_PM
+       unsigned long addr = 0;
        /* using the wait instruction makes CP0 counter unusable */
-       __asm__(".set\tmips3\n\t"
+       __asm__("la %0,au1k_wait\n\t"
+               ".set mips3\n\t"
+               "cache 0x14,0(%0)\n\t"
+               "cache 0x14,32(%0)\n\t"
+               "sync\n\t"
+               "nop\n\t"
                "wait\n\t"
                "nop\n\t"
                "nop\n\t"
                "nop\n\t"
                "nop\n\t"
-               ".set\tmips0");
-#else
-       __asm__("nop\n\t"
-               "nop");
-#endif
+               ".set mips0\n\t"
+               : : "r" (addr));
 }
 
 static inline void check_wait(void)
@@ -112,19 +109,17 @@ static inline void check_wait(void)
                cpu_wait = r4k_wait;
                printk(" available.\n");
                break;
-#ifdef CONFIG_PM
        case CPU_AU1000:
        case CPU_AU1100:
        case CPU_AU1500:
-               if (au1k_wait_ptr != NULL) {
-                       cpu_wait = au1k_wait_ptr;
+       case CPU_AU1550:
+       case CPU_AU1200:
+               if (allow_au1k_wait) {
+                       cpu_wait = au1k_wait;
                        printk(" available.\n");
-               }
-               else {
+               } else
                        printk(" unavailable.\n");
-               }
                break;
-#endif
        default:
                printk(" unavailable.\n");
                break;
@@ -461,6 +456,10 @@ static inline void cpu_probe_mips(struct cpuinfo_mips *c)
                c->cputype = CPU_4KEC;
                c->isa_level = MIPS_CPU_ISA_M32;
                break;
+       case PRID_IMP_4KECR2:
+               c->cputype = CPU_4KEC;
+               c->isa_level = MIPS_CPU_ISA_M32;
+               break;
        case PRID_IMP_4KSC:
                c->cputype = CPU_4KSC;
                c->isa_level = MIPS_CPU_ISA_M32;
@@ -505,6 +504,9 @@ static inline void cpu_probe_alchemy(struct cpuinfo_mips *c)
                case 3:
                        c->cputype = CPU_AU1550;
                        break;
+               case 4:
+                       c->cputype = CPU_AU1200;
+                       break;
                default:
                        panic("Unknown Au Core!");
                        break;