[MIPS] Change PCI host bridge setup/resources

[powerpc.git] / arch / mips / sni / pcimt.c

diff --git a/arch/mips/sni/pcimt.c b/arch/mips/sni/pcimt.c
index 8e8593b..9ee208d 100644 (file)
--- a/arch/mips/sni/pcimt.c
+++ b/arch/mips/sni/pcimt.c
@@ -91,7 +91,7 @@ static struct platform_device pcimt_serial8250_device = {
 };
 
 static struct resource sni_io_resource = {
-       .start  = 0x00001000UL,
+       .start  = 0x00000000UL,
        .end    = 0x03bfffffUL,
        .name   = "PCIMT IO MEM",
        .flags  = IORESOURCE_IO,
@@ -132,107 +132,19 @@ static struct resource pcimt_io_resources[] = {
 };
 
 static struct resource sni_mem_resource = {
-       .start  = 0x10000000UL,
-       .end    = 0xffffffffUL,
+       .start  = 0x18000000UL,
+       .end    = 0x1fbfffffUL,
        .name   = "PCIMT PCI MEM",
        .flags  = IORESOURCE_MEM
 };
 
-/*
- * The RM200/RM300 has a few holes in it's PCI/EISA memory address space used
- * for other purposes.  Be paranoid and allocate all of the before the PCI
- * code gets a chance to to map anything else there ...
- *
- * This leaves the following areas available:
- *
- * 0x10000000 - 0x1009ffff (640kB) PCI/EISA/ISA Bus Memory
- * 0x10100000 - 0x13ffffff ( 15MB) PCI/EISA/ISA Bus Memory
- * 0x18000000 - 0x1fbfffff (124MB) PCI/EISA Bus Memory
- * 0x1ff08000 - 0x1ffeffff (816kB) PCI/EISA Bus Memory
- * 0xa0000000 - 0xffffffff (1.5GB) PCI/EISA Bus Memory
- */
-static struct resource pcimt_mem_resources[] = {
-       {
-               .start  = 0x100a0000,
-               .end    = 0x100bffff,
-               .name   = "Video RAM area",
-               .flags  = IORESOURCE_BUSY
-       }, {
-               .start  = 0x100c0000,
-               .end    = 0x100fffff,
-               .name   = "ISA Reserved",
-               .flags  = IORESOURCE_BUSY
-       }, {
-               .start  = 0x14000000,
-               .end    = 0x17bfffff,
-               .name   = "PCI IO",
-               .flags  = IORESOURCE_BUSY
-       }, {
-               .start  = 0x17c00000,
-               .end    = 0x17ffffff,
-               .name   = "Cache Replacement Area",
-               .flags  = IORESOURCE_BUSY
-       }, {
-               .start  = 0x1a000000,
-               .end    = 0x1a000003,
-               .name   = "PCI INT Acknowledge",
-               .flags  = IORESOURCE_BUSY
-       }, {
-               .start  = 0x1fc00000,
-               .end    = 0x1fc7ffff,
-               .name   = "Boot PROM",
-               .flags  = IORESOURCE_BUSY
-       }, {
-               .start  = 0x1fc80000,
-               .end    = 0x1fcfffff,
-               .name   = "Diag PROM",
-               .flags  = IORESOURCE_BUSY
-       }, {
-               .start  = 0x1fd00000,
-               .end    = 0x1fdfffff,
-               .name   = "X-Bus",
-               .flags  = IORESOURCE_BUSY
-       }, {
-               .start  = 0x1fe00000,
-               .end    = 0x1fefffff,
-               .name   = "BIOS map",
-               .flags  = IORESOURCE_BUSY
-       }, {
-               .start  = 0x1ff00000,
-               .end    = 0x1ff7ffff,
-               .name   = "NVRAM / EEPROM",
-               .flags  = IORESOURCE_BUSY
-       }, {
-               .start  = 0x1fff0000,
-               .end    = 0x1fffefff,
-               .name   = "ASIC PCI",
-               .flags  = IORESOURCE_BUSY
-       }, {
-               .start  = 0x1ffff000,
-               .end    = 0x1fffffff,
-               .name   = "MP Agent",
-               .flags  = IORESOURCE_BUSY
-       }, {
-               .start  = 0x20000000,
-               .end    = 0x9fffffff,
-               .name   = "Main Memory",
-               .flags  = IORESOURCE_BUSY
-       }
-};
-
 static void __init sni_pcimt_resource_init(void)
 {
        int i;
 
        /* request I/O space for devices used on all i[345]86 PCs */
        for (i = 0; i < ARRAY_SIZE(pcimt_io_resources); i++)
-               request_resource(&ioport_resource, pcimt_io_resources + i);
-
-       /* request mem space for pcimt-specific devices */
-       for (i = 0; i < ARRAY_SIZE(pcimt_mem_resources); i++)
-               request_resource(&sni_mem_resource, pcimt_mem_resources + i);
-
-       ioport_resource.end = sni_io_resource.end;
+               request_resource(&sni_io_resource, pcimt_io_resources + i);
 }
 
 extern struct pci_ops sni_pcimt_ops;
@@ -240,9 +152,10 @@ extern struct pci_ops sni_pcimt_ops;
 static struct pci_controller sni_controller = {
        .pci_ops        = &sni_pcimt_ops,
        .mem_resource   = &sni_mem_resource,
-       .mem_offset     = 0x10000000UL,
+       .mem_offset     = 0x00000000UL,
        .io_resource    = &sni_io_resource,
-       .io_offset      = 0x00000000UL
+       .io_offset      = 0x00000000UL,
+       .io_map_base    = SNI_PORT_BASE
 };
 
 static void enable_pcimt_irq(unsigned int irq)
@@ -363,15 +276,17 @@ void __init sni_pcimt_irq_init(void)
 
 void sni_pcimt_init(void)
 {
-       sni_pcimt_resource_init();
        sni_pcimt_detect();
        sni_pcimt_sc_init();
        rtc_mips_get_time = mc146818_get_cmos_time;
        rtc_mips_set_time = mc146818_set_rtc_mmss;
        board_time_init = sni_cpu_time_init;
+       ioport_resource.end = sni_io_resource.end;
 #ifdef CONFIG_PCI
+       PCIBIOS_MIN_IO = 0x9000;
        register_pci_controller(&sni_controller);
 #endif
+       sni_pcimt_resource_init();
 }
 
 static int __init snirm_pcimt_setup_devinit(void)