Merge ../linux-2.6

[powerpc.git] / arch / parisc / kernel / cache.c

diff --git a/arch/parisc/kernel/cache.c b/arch/parisc/kernel/cache.c
index a065349..bc7c4a4 100644 (file)
--- a/arch/parisc/kernel/cache.c
+++ b/arch/parisc/kernel/cache.c
@@ -4,7 +4,7 @@
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
  *
- * Copyright (C) 1999 Helge Deller (07-13-1999)
+ * Copyright (C) 1999-2006 Helge Deller <deller@gmx.de> (07-13-1999)
  * Copyright (C) 1999 SuSE GmbH Nuernberg
  * Copyright (C) 2000 Philipp Rumpf (prumpf@tux.org)
  *
@@ -29,9 +29,9 @@
 #include <asm/processor.h>
 #include <asm/sections.h>
 
-int split_tlb;
-int dcache_stride;
-int icache_stride;
+int split_tlb __read_mostly;
+int dcache_stride __read_mostly;
+int icache_stride __read_mostly;
 EXPORT_SYMBOL(dcache_stride);
 
 
@@ -45,29 +45,29 @@ DEFINE_SPINLOCK(pa_tlb_lock);
 EXPORT_SYMBOL(pa_tlb_lock);
 #endif
 
-struct pdc_cache_info cache_info;
+struct pdc_cache_info cache_info __read_mostly;
 #ifndef CONFIG_PA20
-static struct pdc_btlb_info btlb_info;
+static struct pdc_btlb_info btlb_info __read_mostly;
 #endif
 
 #ifdef CONFIG_SMP
 void
 flush_data_cache(void)
 {
-       on_each_cpu((void (*)(void *))flush_data_cache_local, NULL, 1, 1);
+       on_each_cpu(flush_data_cache_local, NULL, 1, 1);
 }
 void 
 flush_instruction_cache(void)
 {
-       on_each_cpu((void (*)(void *))flush_instruction_cache_local, NULL, 1, 1);
+       on_each_cpu(flush_instruction_cache_local, NULL, 1, 1);
 }
 #endif
 
 void
 flush_cache_all_local(void)
 {
-       flush_instruction_cache_local();
-       flush_data_cache_local();
+       flush_instruction_cache_local(NULL);
+       flush_data_cache_local(NULL);
 }
 EXPORT_SYMBOL(flush_cache_all_local);
 
@@ -89,7 +89,7 @@ update_mmu_cache(struct vm_area_struct *vma, unsigned long address, pte_t pte)
        if (pfn_valid(page_to_pfn(page)) && page_mapping(page) &&
            test_bit(PG_dcache_dirty, &page->flags)) {
 
-               flush_kernel_dcache_page(page_address(page));
+               flush_kernel_dcache_page(page);
                clear_bit(PG_dcache_dirty, &page->flags);
        }
 }
@@ -97,15 +97,17 @@ update_mmu_cache(struct vm_area_struct *vma, unsigned long address, pte_t pte)
 void
 show_cache_info(struct seq_file *m)
 {
+       char buf[32];
+
        seq_printf(m, "I-cache\t\t: %ld KB\n", 
                cache_info.ic_size/1024 );
-       seq_printf(m, "D-cache\t\t: %ld KB (%s%s, %d-way associative)\n", 
+       if (cache_info.dc_loop == 1)
+               snprintf(buf, 32, "%lu-way associative", cache_info.dc_loop);
+       seq_printf(m, "D-cache\t\t: %ld KB (%s%s, %s)\n",
                cache_info.dc_size/1024,
                (cache_info.dc_conf.cc_wt ? "WT":"WB"),
                (cache_info.dc_conf.cc_sh ? ", shared I/D":""),
-               (cache_info.dc_conf.cc_assoc)
-       );
-
+               ((cache_info.dc_loop == 1) ? "direct mapped" : buf));
        seq_printf(m, "ITLB entries\t: %ld\n" "DTLB entries\t: %ld%s\n",
                cache_info.it_size,
                cache_info.dt_size,
@@ -158,11 +160,11 @@ parisc_cache_init(void)
                cache_info.dc_conf.cc_block,
                cache_info.dc_conf.cc_line,
                cache_info.dc_conf.cc_shift);
-       printk("        wt %d sh %d cst %d assoc %d\n",
+       printk("        wt %d sh %d cst %d hv %d\n",
                cache_info.dc_conf.cc_wt,
                cache_info.dc_conf.cc_sh,
                cache_info.dc_conf.cc_cst,
-               cache_info.dc_conf.cc_assoc);
+               cache_info.dc_conf.cc_hv);
 
        printk("IC  base 0x%lx stride 0x%lx count 0x%lx loop 0x%lx\n",
                cache_info.ic_base,
@@ -176,11 +178,11 @@ parisc_cache_init(void)
                cache_info.ic_conf.cc_block,
                cache_info.ic_conf.cc_line,
                cache_info.ic_conf.cc_shift);
-       printk("        wt %d sh %d cst %d assoc %d\n",
+       printk("        wt %d sh %d cst %d hv %d\n",
                cache_info.ic_conf.cc_wt,
                cache_info.ic_conf.cc_sh,
                cache_info.ic_conf.cc_cst,
-               cache_info.ic_conf.cc_assoc);
+               cache_info.ic_conf.cc_hv);
 
        printk("D-TLB conf: sh %d page %d cst %d aid %d pad1 %d \n",
                cache_info.dt_conf.tc_sh,
@@ -234,7 +236,8 @@ parisc_cache_init(void)
 
 void disable_sr_hashing(void)
 {
-       int srhash_type;
+       int srhash_type, retval;
+       unsigned long space_bits;
 
        switch (boot_cpu_data.cpu_type) {
        case pcx: /* We shouldn't get this far.  setup.c should prevent it. */
@@ -260,6 +263,13 @@ void disable_sr_hashing(void)
        }
 
        disable_sr_hashing_asm(srhash_type);
+
+       retval = pdc_spaceid_bits(&space_bits);
+       /* If this procedure isn't implemented, don't panic. */
+       if (retval < 0 && retval != PDC_BAD_OPTION)
+               panic("pdc_spaceid_bits call failed.\n");
+       if (space_bits != 0)
+               panic("SpaceID hashing is still on!\n");
 }
 
 void flush_dcache_page(struct page *page)
@@ -278,7 +288,7 @@ void flush_dcache_page(struct page *page)
                return;
        }
 
-       flush_kernel_dcache_page(page_address(page));
+       flush_kernel_dcache_page(page);
 
        if (!mapping)
                return;
@@ -317,7 +327,7 @@ EXPORT_SYMBOL(flush_dcache_page);
 
 /* Defined in arch/parisc/kernel/pacache.S */
 EXPORT_SYMBOL(flush_kernel_dcache_range_asm);
-EXPORT_SYMBOL(flush_kernel_dcache_page);
+EXPORT_SYMBOL(flush_kernel_dcache_page_asm);
 EXPORT_SYMBOL(flush_data_cache_local);
 EXPORT_SYMBOL(flush_kernel_icache_range_asm);
 
@@ -332,7 +342,7 @@ void clear_user_page_asm(void *page, unsigned long vaddr)
 }
 
 #define FLUSH_THRESHOLD 0x80000 /* 0.5MB */
-int parisc_cache_flush_threshold = FLUSH_THRESHOLD;
+int parisc_cache_flush_threshold __read_mostly = FLUSH_THRESHOLD;
 
 void parisc_setup_cache_timing(void)
 {
@@ -358,5 +368,5 @@ void parisc_setup_cache_timing(void)
        if (!parisc_cache_flush_threshold)
                parisc_cache_flush_threshold = FLUSH_THRESHOLD;
 
-       printk("Setting cache flush threshold to %x (%d CPUs online)\n", parisc_cache_flush_threshold, num_online_cpus());
+       printk(KERN_INFO "Setting cache flush threshold to %x (%d CPUs online)\n", parisc_cache_flush_threshold, num_online_cpus());
 }