--- /dev/null
+/*
+ * Device Tree Souce for kvme080
+ *
+ * Copyright 2007 Sangmoon Kim <dogoil@etinsys.com>.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+/ {
+ model = "kvme080";
+ compatible = "kvme080";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cpus {
+ #cpus = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ PowerPC,8245@0 {
+ device_type = "cpu";
+ reg = <0>;
+ i-cache-line-size = <20>;
+ d-cache-line-size = <20>;
+ i-cache-size = <4000>;
+ d-cache-size = <4000>;
+ timebase-frequency = <0>; // from bootloader
+ clock-frequency = <0>; // from bootloader
+ };
+ };
+
+ memory {
+ device_type = "memory";
+ reg = <00000000 00000000>; // from bootloader
+ };
+
+ soc8245@fc000000 {
+ device_type = "soc";
+ ranges = <80000000 80000000 70000000 // pci mem space
+ fc000000 fc000000 00100000 // EUMB
+ fe000000 fe000000 00c00000 // pci i/o space
+ fec00000 fec00000 00300000 // pci cfg regs
+ fef00000 fef00000 00100000 // pci iack
+ ff080000 ff080000 00000040>; // UARTs
+ reg = <fc000000 00100000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ #interrupt-cells = <2>;
+
+ i2c@fc003000 {
+ device_type = "i2c";
+ compatible = "fsl-i2c";
+ clock-frequency = <0>;
+ reg = <fc003000 1000>;
+ interrupts = <32 0>;
+ interrupt-parent = <40000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ #interrupt-cells = <1>;
+ };
+
+ pic@fc040000 {
+ device_type = "open-pic";
+ compatible = "chrp,open-pic";
+ interrupt-controller;
+ reg = <fc040000 40000>;
+ clock-frequency = <0>;
+ serial-mode = <1>;
+ built-in;
+ linux,phandle = <40000>;
+ #interrupt-cells = <2>;
+ #address-cells = <0>;
+ };
+
+ pci@fec00000 {
+ device_type = "pci";
+ compatible = "8245";
+ reg = <fec00000 00400000>;
+ ranges = <01000000 0 0 fe000000 0 00c00000
+ 02000000 0 80000000 80000000 0 70000000>;
+ bus-range = <0 ff>;
+ interrupt-parent = <40000>;
+ interrupt-map-mask = <f800 0 0 7>;
+ interrupt-map = <
+ // IDSEL 16
+ 8000 0 0 1 40000 0 1
+ 8000 0 0 2 40000 1 1
+ 8000 0 0 3 40000 2 1
+ 8000 0 0 4 40000 3 1
+ // IDSEL 17
+ 8800 0 0 1 40000 1 1
+ 8800 0 0 2 40000 2 1
+ 8800 0 0 3 40000 3 1
+ 8800 0 0 4 40000 4 1
+ // IDSEL 18
+ 9000 0 0 1 40000 2 1
+ 9000 0 0 2 40000 3 1
+ 9000 0 0 3 40000 4 1
+ 9000 0 0 4 40000 0 1
+ // IDSEL 19
+ 9800 0 0 1 40000 3 1
+ 9800 0 0 2 40000 4 1
+ 9800 0 0 3 40000 0 1
+ 9800 0 0 4 40000 1 1
+ // IDSEL 20
+ a000 0 0 1 40000 4 1
+ a000 0 0 2 40000 0 1
+ a000 0 0 3 40000 1 1
+ a000 0 0 4 40000 2 1
+ >;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ #interrupt-cells = <1>;
+ };
+
+ serial@ff080000 {
+ device_type = "serial";
+ compatible = "ns16550";
+ reg = <ff080000 8>;
+ clock-frequency = <e10000>;
+ current-speed = <1c200>;
+ interrupts = <5 1>;
+ interrupt-parent = <40000>;
+ };
+
+ serial@ff080010 {
+ device_type = "serial";
+ compatible = "ns16550";
+ reg = <ff080010 8>;
+ clock-frequency = <e10000>;
+ current-speed = <1c200>;
+ interrupts = <5 1>;
+ interrupt-parent = <40000>;
+ };
+
+ serial@ff080020 {
+ device_type = "serial";
+ compatible = "ns16550";
+ reg = <ff080020 8>;
+ clock-frequency = <e10000>;
+ current-speed = <1c200>;
+ interrupts = <5 1>;
+ interrupt-parent = <40000>;
+ };
+
+ serial@ff080030 {
+ device_type = "serial";
+ compatible = "ns16550";
+ reg = <ff080030 8>;
+ clock-frequency = <e10000>;
+ current-speed = <1c200>;
+ interrupts = <5 1>;
+ interrupt-parent = <40000>;
+ };
+ };
+
+ nvram@ff000000 {
+ device_type = "nvram";
+ reg = <ff000000 7fff0>;
+ };
+
+ rtc@ff07fff8 {
+ device_type = "rtc";
+ reg = <ff07fff8 8>;
+ };
+};