ppc64: remove ppc_irq_dispatch_handler

[powerpc.git] / arch / powerpc / kernel / misc_64.S

diff --git a/arch/powerpc/kernel/misc_64.S b/arch/powerpc/kernel/misc_64.S
index b3e95ff..ae48a00 100644 (file)
--- a/arch/powerpc/kernel/misc_64.S
+++ b/arch/powerpc/kernel/misc_64.S
@@ -89,12 +89,12 @@ _GLOBAL(call_do_softirq)
        mtlr    r0
        blr
 
-_GLOBAL(call_handle_IRQ_event)
+_GLOBAL(call___do_IRQ)
        mflr    r0
        std     r0,16(r1)
-       stdu    r1,THREAD_SIZE-112(r6)
-       mr      r1,r6
-       bl      .handle_IRQ_event
+       stdu    r1,THREAD_SIZE-112(r5)
+       mr      r1,r5
+       bl      .__do_IRQ
        ld      r1,0(r1)
        ld      r0,16(r1)
        mtlr    r0
@@ -603,6 +603,76 @@ _GLOBAL(real_writeb)
        blr
 #endif /* defined(CONFIG_PPC_PMAC) || defined(CONFIG_PPC_MAPLE) */
 
+/*
+ * SCOM access functions for 970 (FX only for now)
+ *
+ * unsigned long scom970_read(unsigned int address);
+ * void scom970_write(unsigned int address, unsigned long value);
+ *
+ * The address passed in is the 24 bits register address. This code
+ * is 970 specific and will not check the status bits, so you should
+ * know what you are doing.
+ */
+_GLOBAL(scom970_read)
+       /* interrupts off */
+       mfmsr   r4
+       ori     r0,r4,MSR_EE
+       xori    r0,r0,MSR_EE
+       mtmsrd  r0,1
+
+       /* rotate 24 bits SCOM address 8 bits left and mask out it's low 8 bits
+        * (including parity). On current CPUs they must be 0'd,
+        * and finally or in RW bit
+        */
+       rlwinm  r3,r3,8,0,15
+       ori     r3,r3,0x8000
+
+       /* do the actual scom read */
+       sync
+       mtspr   SPRN_SCOMC,r3
+       isync
+       mfspr   r3,SPRN_SCOMD
+       isync
+       mfspr   r0,SPRN_SCOMC
+       isync
+
+       /* XXX: fixup result on some buggy 970's (ouch ! we lost a bit, bah
+        * that's the best we can do). Not implemented yet as we don't use
+        * the scom on any of the bogus CPUs yet, but may have to be done
+        * ultimately
+        */
+
+       /* restore interrupts */
+       mtmsrd  r4,1
+       blr
+
+
+_GLOBAL(scom970_write)
+       /* interrupts off */
+       mfmsr   r5
+       ori     r0,r5,MSR_EE
+       xori    r0,r0,MSR_EE
+       mtmsrd  r0,1
+
+       /* rotate 24 bits SCOM address 8 bits left and mask out it's low 8 bits
+        * (including parity). On current CPUs they must be 0'd.
+        */
+
+       rlwinm  r3,r3,8,0,15
+
+       sync
+       mtspr   SPRN_SCOMD,r4      /* write data */
+       isync
+       mtspr   SPRN_SCOMC,r3      /* write command */
+       isync
+       mfspr   3,SPRN_SCOMC
+       isync
+
+       /* restore interrupts */
+       mtmsrd  r5,1
+       blr
+
+
 /*
  * Create a kernel thread
  *   kernel_thread(fn, arg, flags)