#include <linux/adb.h>
#include <linux/module.h>
#include <linux/delay.h>
-#include <linux/ide.h>
#include <linux/console.h>
#include <linux/seq_file.h>
#include <linux/root_dev.h>
extern unsigned long loops_per_jiffy;
/* To be replaced by RTAS when available */
-static unsigned int *briq_SPOR;
+static unsigned int __iomem *briq_SPOR;
#ifdef CONFIG_SMP
extern struct smp_ops_t chrp_smp_ops;
struct device_node *root;
const char *model = "";
- root = find_path_device("/");
+ root = of_find_node_by_path("/");
if (root)
- model = get_property(root, "model", NULL);
+ model = of_get_property(root, "model", NULL);
seq_printf(m, "machine\t\t: CHRP %s\n", model);
/* longtrail (goldengate) stuff */
gg2_cachetypes[(t>>2) & 3],
gg2_cachemodes[t & 3]);
}
+ of_node_put(root);
}
/*
{
struct device_node *root;
- if ((root = find_path_device("/")) &&
- !strncmp(get_property(root, "model", NULL), "IBM,LongTrail", 13)) {
+ if ((root = of_find_node_by_path("/")) &&
+ !strncmp(of_get_property(root, "model", NULL),
+ "IBM,LongTrail", 13)) {
/* logical device 0 (KBC/Keyboard) */
sio_fixup_irq("keyboard", 0, 1, 2);
/* select logical device 1 (KBC/Mouse) */
sio_fixup_irq("mouse", 1, 12, 2);
}
+ of_node_put(root);
}
return;
/* Enable L2 cache if needed */
- np = find_type_devices("cpu");
+ np = of_find_node_by_type(NULL, "cpu");
if (np != NULL) {
- const unsigned int *l2cr = get_property(np, "l2cr", NULL);
+ const unsigned int *l2cr = of_get_property(np, "l2cr", NULL);
if (l2cr == NULL) {
printk ("Pegasos l2cr : no cpu l2cr property found\n");
- return;
+ goto out;
}
if (!((*l2cr) & 0x80000000)) {
printk ("Pegasos l2cr : L2 cache was not active, "
_set_L2CR((*l2cr) | 0x80000000);
}
}
+out:
+ of_node_put(np);
}
static void briq_restart(char *cmd)
void __init chrp_setup_arch(void)
{
- struct device_node *root = find_path_device ("/");
+ struct device_node *root = of_find_node_by_path("/");
const char *machine = NULL;
/* init to some ~sane value until calibrate_delay() runs */
loops_per_jiffy = 50000000/HZ;
if (root)
- machine = get_property(root, "model", NULL);
+ machine = of_get_property(root, "model", NULL);
if (machine && strncmp(machine, "Pegasos", 7) == 0) {
_chrp_type = _CHRP_Pegasos;
} else if (machine && strncmp(machine, "IBM", 3) == 0) {
} else if (machine && strncmp(machine, "TotalImpact,BRIQ-1", 18) == 0) {
_chrp_type = _CHRP_briq;
/* Map the SPOR register on briq and change the restart hook */
- briq_SPOR = (unsigned int *)ioremap(0xff0000e8, 4);
+ briq_SPOR = ioremap(0xff0000e8, 4);
ppc_md.restart = briq_restart;
} else {
/* Let's assume it is an IBM chrp if all else fails */
_chrp_type = _CHRP_IBM;
}
+ of_node_put(root);
printk("chrp type = %x [%s]\n", _chrp_type, chrp_names[_chrp_type]);
rtas_initialize();
return;
root = of_find_node_by_path("/");
if (root) {
- opprop = get_property(root, "platform-open-pic", &oplen);
- na = prom_n_addr_cells(root);
+ opprop = of_get_property(root, "platform-open-pic", &oplen);
+ na = of_n_addr_cells(root);
}
if (opprop && oplen >= na * sizeof(unsigned int)) {
opaddr = opprop[na-1]; /* assume 32-bit */
printk(KERN_INFO "OpenPIC at %lx\n", opaddr);
- iranges = get_property(np, "interrupt-ranges", &len);
+ iranges = of_get_property(np, "interrupt-ranges", &len);
if (iranges == NULL)
len = 0; /* non-distributed mpic */
else
of_node_put(np);
}
-#if defined(CONFIG_VT) && defined(CONFIG_INPUT_ADBHID) && defined(XMON)
+#if defined(CONFIG_VT) && defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_XMON)
static struct irqaction xmon_irqaction = {
.handler = xmon_irq,
.mask = CPU_MASK_NONE,
* Also, Pegasos-type platforms don't have a proper node to start
* from anyway
*/
- for (np = find_devices("pci"); np != NULL; np = np->next) {
- const unsigned int *addrp = get_property(np,
+ for_each_node_by_name(np, "pci") {
+ const unsigned int *addrp = of_get_property(np,
"8259-interrupt-acknowledge", NULL);
if (addrp == NULL)
continue;
- chrp_int_ack = addrp[prom_n_addr_cells(np)-1];
+ chrp_int_ack = addrp[of_n_addr_cells(np)-1];
break;
}
+ of_node_put(np);
if (np == NULL)
printk(KERN_WARNING "Cannot find PCI interrupt acknowledge"
" address, polling\n");
i8259_init(pic, chrp_int_ack);
- if (ppc_md.get_irq == NULL)
+ if (ppc_md.get_irq == NULL) {
ppc_md.get_irq = i8259_irq;
+ irq_set_default_host(i8259_get_host());
+ }
if (chrp_mpic != NULL) {
cascade_irq = irq_of_parse_and_map(pic, 0);
if (cascade_irq == NO_IRQ)
void __init chrp_init_IRQ(void)
{
-#if defined(CONFIG_VT) && defined(CONFIG_INPUT_ADBHID) && defined(XMON)
+#if defined(CONFIG_VT) && defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_XMON)
struct device_node *kbd;
#endif
chrp_find_openpic();
if (_chrp_type == _CHRP_Pegasos)
ppc_md.get_irq = i8259_irq;
-#if defined(CONFIG_VT) && defined(CONFIG_INPUT_ADBHID) && defined(XMON)
+#if defined(CONFIG_VT) && defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_XMON)
/* see if there is a keyboard in the device tree
with a parent of type "adb" */
- for (kbd = find_devices("keyboard"); kbd; kbd = kbd->next)
+ for_each_node_by_name(kbd, "keyboard")
if (kbd->parent && kbd->parent->type
&& strcmp(kbd->parent->type, "adb") == 0)
break;
+ of_node_put(kbd);
if (kbd)
setup_irq(HYDRA_INT_ADB_NMI, &xmon_irqaction);
#endif
/* Get the event scan rate for the rtas so we know how
* often it expects a heartbeat. -- Cort
*/
- device = find_devices("rtas");
+ device = of_find_node_by_name(NULL, "rtas");
if (device)
- p = get_property(device, "rtas-event-scan-rate", NULL);
+ p = of_get_property(device, "rtas-event-scan-rate", NULL);
if (p && *p) {
/*
* Arrange to call chrp_event_scan at least *p times
printk("RTAS Event Scan Rate: %u (%lu jiffies)\n",
*p, interval);
}
+ of_node_put(device);
if (ppc_md.progress)
ppc_md.progress(" Have fun! ", 0x7777);
ISA_DMA_THRESHOLD = ~0L;
DMA_MODE_READ = 0x44;
DMA_MODE_WRITE = 0x48;
- isa_io_base = CHRP_ISA_IO_BASE; /* default value */
return 1;
}
.init = chrp_init2,
.show_cpuinfo = chrp_show_cpuinfo,
.init_IRQ = chrp_init_IRQ,
- .pcibios_fixup = chrp_pcibios_fixup,
.restart = rtas_restart,
.power_off = rtas_power_off,
.halt = rtas_halt,
projects / powerpc.git / blobdiff