ahci: port_no should be used when clearing IRQ in ahci_thaw()

[powerpc.git] / drivers / ata / ahci.c

diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c
index b517d24..48616c6 100644 (file)
--- a/drivers/ata/ahci.c
+++ b/drivers/ata/ahci.c
@@ -75,6 +75,7 @@ enum {
        AHCI_CMD_CLR_BUSY       = (1 << 10),
 
        RX_FIS_D2H_REG          = 0x40, /* offset of D2H Register FIS data */
+       RX_FIS_SDB              = 0x58, /* offset of SDB FIS data */
        RX_FIS_UNK              = 0x60, /* offset of Unknown FIS data */
 
        board_ahci              = 0,
@@ -202,6 +203,10 @@ struct ahci_port_priv {
        dma_addr_t              cmd_tbl_dma;
        void                    *rx_fis;
        dma_addr_t              rx_fis_dma;
+       /* for NCQ spurious interrupt analysis */
+       int                     ncq_saw_spurious_sdb_cnt;
+       unsigned int            ncq_saw_d2h:1;
+       unsigned int            ncq_saw_dmas:1;
 };
 
 static u32 ahci_scr_read (struct ata_port *ap, unsigned int sc_reg);
@@ -361,7 +366,7 @@ static const struct pci_device_id ahci_pci_tbl[] = {
        { PCI_VDEVICE(INTEL, 0x27c1), board_ahci }, /* ICH7 */
        { PCI_VDEVICE(INTEL, 0x27c5), board_ahci }, /* ICH7M */
        { PCI_VDEVICE(INTEL, 0x27c3), board_ahci }, /* ICH7R */
-       { PCI_VDEVICE(AL, 0x5288), board_ahci }, /* ULi M5288 */
+       { PCI_VDEVICE(AL, 0x5288), board_ahci_ign_iferr }, /* ULi M5288 */
        { PCI_VDEVICE(INTEL, 0x2681), board_ahci }, /* ESB2 */
        { PCI_VDEVICE(INTEL, 0x2682), board_ahci }, /* ESB2 */
        { PCI_VDEVICE(INTEL, 0x2683), board_ahci }, /* ESB2 */
@@ -586,35 +591,18 @@ static void ahci_power_down(void __iomem *port_mmio, u32 cap)
 {
        u32 cmd, scontrol;
 
-       cmd = readl(port_mmio + PORT_CMD) & ~PORT_CMD_ICC_MASK;
-
-       if (cap & HOST_CAP_SSC) {
-               /* enable transitions to slumber mode */
-               scontrol = readl(port_mmio + PORT_SCR_CTL);
-               if ((scontrol & 0x0f00) > 0x100) {
-                       scontrol &= ~0xf00;
-                       writel(scontrol, port_mmio + PORT_SCR_CTL);
-               }
-
-               /* put device into slumber mode */
-               writel(cmd | PORT_CMD_ICC_SLUMBER, port_mmio + PORT_CMD);
-
-               /* wait for the transition to complete */
-               ata_wait_register(port_mmio + PORT_CMD, PORT_CMD_ICC_SLUMBER,
-                                 PORT_CMD_ICC_SLUMBER, 1, 50);
-       }
+       if (!(cap & HOST_CAP_SSS))
+               return;
 
-       /* put device into listen mode */
-       if (cap & HOST_CAP_SSS) {
-               /* first set PxSCTL.DET to 0 */
-               scontrol = readl(port_mmio + PORT_SCR_CTL);
-               scontrol &= ~0xf;
-               writel(scontrol, port_mmio + PORT_SCR_CTL);
+       /* put device into listen mode, first set PxSCTL.DET to 0 */
+       scontrol = readl(port_mmio + PORT_SCR_CTL);
+       scontrol &= ~0xf;
+       writel(scontrol, port_mmio + PORT_SCR_CTL);
 
-               /* then set PxCMD.SUD to 0 */
-               cmd &= ~PORT_CMD_SPIN_UP;
-               writel(cmd, port_mmio + PORT_CMD);
-       }
+       /* then set PxCMD.SUD to 0 */
+       cmd = readl(port_mmio + PORT_CMD) & ~PORT_CMD_ICC_MASK;
+       cmd &= ~PORT_CMD_SPIN_UP;
+       writel(cmd, port_mmio + PORT_CMD);
 }
 
 static void ahci_init_port(void __iomem *port_mmio, u32 cap,
@@ -915,7 +903,7 @@ static int ahci_hardreset(struct ata_port *ap, unsigned int *class)
 
        /* clear D2H reception area to properly wait for D2H FIS */
        ata_tf_init(ap->device, &tf);
-       tf.command = 0xff;
+       tf.command = 0x80;
        ata_tf_to_fis(&tf, d2h_fis, 0);
 
        rc = sata_std_hardreset(ap, class);
@@ -1126,8 +1114,9 @@ static void ahci_host_intr(struct ata_port *ap)
        void __iomem *mmio = ap->host->mmio_base;
        void __iomem *port_mmio = ahci_port_base(mmio, ap->port_no);
        struct ata_eh_info *ehi = &ap->eh_info;
+       struct ahci_port_priv *pp = ap->private_data;
        u32 status, qc_active;
-       int rc;
+       int rc, known_irq = 0;
 
        status = readl(port_mmio + PORT_IRQ_STAT);
        writel(status, port_mmio + PORT_IRQ_STAT);
@@ -1154,17 +1143,53 @@ static void ahci_host_intr(struct ata_port *ap)
 
        /* hmmm... a spurious interupt */
 
-       /* some devices send D2H reg with I bit set during NCQ command phase */
-       if (ap->sactive && (status & PORT_IRQ_D2H_REG_FIS))
+       /* if !NCQ, ignore.  No modern ATA device has broken HSM
+        * implementation for non-NCQ commands.
+        */
+       if (!ap->sactive)
                return;
 
-       /* ignore interim PIO setup fis interrupts */
-       if (ata_tag_valid(ap->active_tag) && (status & PORT_IRQ_PIOS_FIS))
-               return;
+       if (status & PORT_IRQ_D2H_REG_FIS) {
+               if (!pp->ncq_saw_d2h)
+                       ata_port_printk(ap, KERN_INFO,
+                               "D2H reg with I during NCQ, "
+                               "this message won't be printed again\n");
+               pp->ncq_saw_d2h = 1;
+               known_irq = 1;
+       }
+
+       if (status & PORT_IRQ_DMAS_FIS) {
+               if (!pp->ncq_saw_dmas)
+                       ata_port_printk(ap, KERN_INFO,
+                               "DMAS FIS during NCQ, "
+                               "this message won't be printed again\n");
+               pp->ncq_saw_dmas = 1;
+               known_irq = 1;
+       }
+
+       if (status & PORT_IRQ_SDB_FIS &&
+                  pp->ncq_saw_spurious_sdb_cnt < 10) {
+               /* SDB FIS containing spurious completions might be
+                * dangerous, we need to know more about them.  Print
+                * more of it.
+                */
+               const u32 *f = pp->rx_fis + RX_FIS_SDB;
+
+               ata_port_printk(ap, KERN_INFO, "Spurious SDB FIS during NCQ "
+                               "issue=0x%x SAct=0x%x FIS=%08x:%08x%s\n",
+                               readl(port_mmio + PORT_CMD_ISSUE),
+                               readl(port_mmio + PORT_SCR_ACT),
+                               le32_to_cpu(f[0]), le32_to_cpu(f[1]),
+                               pp->ncq_saw_spurious_sdb_cnt < 10 ?
+                               "" : ", shutting up");
+
+               pp->ncq_saw_spurious_sdb_cnt++;
+               known_irq = 1;
+       }
 
-       if (ata_ratelimit())
+       if (!known_irq)
                ata_port_printk(ap, KERN_INFO, "spurious interrupt "
-                               "(irq_stat 0x%x active_tag %d sactive 0x%x)\n",
+                               "(irq_stat 0x%x active_tag 0x%x sactive 0x%x)\n",
                                status, ap->active_tag, ap->sactive);
 }
 
@@ -1257,7 +1282,7 @@ static void ahci_thaw(struct ata_port *ap)
        /* clear IRQ */
        tmp = readl(port_mmio + PORT_IRQ_STAT);
        writel(tmp, port_mmio + PORT_IRQ_STAT);
-       writel(1 << ap->id, mmio + HOST_IRQ_STAT);
+       writel(1 << ap->port_no, mmio + HOST_IRQ_STAT);
 
        /* turn IRQ back on */
        writel(DEF_PORT_IRQ, port_mmio + PORT_IRQ_MASK);