#include <linux/libata.h>
#define DRV_NAME "pata_optidma"
-#define DRV_VERSION "0.2.1"
+#define DRV_VERSION "0.2.2"
enum {
READ_REG = 0, /* index of Read cycle timing register */
*
* Set up cable type and use generic probe init
*/
-
+
static int optidma_pre_reset(struct ata_port *ap)
{
struct pci_dev *pdev = to_pci_dev(ap->host->dev);
- static const struct pci_bits optidma_enable_bits = {
+ static const struct pci_bits optidma_enable_bits = {
0x40, 1, 0x08, 0x00
};
- if (ap->port_no && !pci_test_config_bits(pdev, &optidma_enable_bits)) {
- ata_port_disable(ap);
- printk(KERN_INFO "ata%u: port disabled. ignoring.\n", ap->id);
- return 0;
- }
+ if (ap->port_no && !pci_test_config_bits(pdev, &optidma_enable_bits))
+ return -ENOENT;
+
ap->cbl = ATA_CBL_PATA40;
return ata_std_prereset(ap);
}
* Unlock the control register block for this adapter. Registers must not
* be unlocked in a situation where libata might look at them.
*/
-
+
static void optidma_unlock(struct ata_port *ap)
{
unsigned long regio = ap->ioaddr.cmd_addr;
-
+
/* These 3 unlock the control register access */
inw(regio + 1);
inw(regio + 1);
*
* Re-lock the configuration register settings.
*/
-
+
static void optidma_lock(struct ata_port *ap)
{
unsigned long regio = ap->ioaddr.cmd_addr;
-
+
/* Relock */
outb(0x83, regio + 2);
}
/* Switch from IDE to control mode */
optidma_unlock(ap);
-
+
/*
* As with many controllers the address setup time is shared
addr = 0;
else
addr = addr_timing[pci_clock][pio];
-
+
if (pair) {
u8 pair_addr;
/* Hardware constraint */
if (pair_addr > addr)
addr = pair_addr;
}
-
+
/* Commence primary programming sequence */
/* First we load the device number into the timing select */
outb(adev->devno, regio + MISC_REG);
/* Programming sequence complete, timing 0 dev 0, timing 1 dev 1 */
outb(0x85, regio + CNTRL_REG);
-
+
/* Switch back to IDE mode */
optidma_lock(ap);
-
+
/* Note: at this point our programming is incomplete. We are
not supposed to program PCI 0x43 "things we hacked onto the chip"
until we've done both sets of PIO/DMA timings */
int dev2 = 2 * adev->devno;
int unit = 2 * ap->port_no + adev->devno;
int udma = mode - XFER_UDMA_0;
-
+
pci_read_config_byte(pdev, 0x44, &udcfg);
if (mode <= XFER_UDMA_0) {
udcfg &= ~(1 << unit);
* DMA programming. The architecture of the Firestar makes it easier
* for us to have a common function so we provide wrappers
*/
-
+
static void optidma_set_pio_mode(struct ata_port *ap, struct ata_device *adev)
{
optidma_set_mode(ap, adev, adev->pio_mode);
* DMA programming. The architecture of the Firestar makes it easier
* for us to have a common function so we provide wrappers
*/
-
+
static void optidma_set_dma_mode(struct ata_port *ap, struct ata_device *adev)
{
optidma_set_mode(ap, adev, adev->dma_mode);
* DMA programming. The architecture of the Firestar makes it easier
* for us to have a common function so we provide wrappers
*/
-
+
static void optiplus_set_pio_mode(struct ata_port *ap, struct ata_device *adev)
{
optiplus_set_mode(ap, adev, adev->pio_mode);
* DMA programming. The architecture of the Firestar makes it easier
* for us to have a common function so we provide wrappers
*/
-
+
static void optiplus_set_dma_mode(struct ata_port *ap, struct ata_device *adev)
{
optiplus_set_mode(ap, adev, adev->dma_mode);
* Turn the ATA device setup into PCI configuration bits
* for register 0x43 and return the two bits needed.
*/
-
+
static u8 optidma_make_bits43(struct ata_device *adev)
{
static const u8 bits43[5] = {
* Finalise the configuration by writing the nibble of extra bits
* of data into the chip.
*/
-
+
static void optidma_post_set_mode(struct ata_port *ap)
{
u8 r;
int nybble = 4 * ap->port_no;
struct pci_dev *pdev = to_pci_dev(ap->host->dev);
-
+
pci_read_config_byte(pdev, 0x43, &r);
-
+
r &= (0x0F << nybble);
- r |= (optidma_make_bits43(&ap->device[0]) +
+ r |= (optidma_make_bits43(&ap->device[0]) +
(optidma_make_bits43(&ap->device[0]) << 2)) << nybble;
pci_write_config_byte(pdev, 0x43, r);
.qc_prep = ata_qc_prep,
.qc_issue = ata_qc_issue_prot,
- .eng_timeout = ata_eng_timeout,
+
.data_xfer = ata_pio_data_xfer,
.irq_handler = ata_interrupt,
.qc_prep = ata_qc_prep,
.qc_issue = ata_qc_issue_prot,
- .eng_timeout = ata_eng_timeout,
+
.data_xfer = ata_pio_data_xfer,
.irq_handler = ata_interrupt,
* optiplus_with_udma - Look for UDMA capable setup
* @pdev; ATA controller
*/
-
+
static int optiplus_with_udma(struct pci_dev *pdev)
{
u8 r;
int ret = 0;
int ioport = 0x22;
struct pci_dev *dev1;
-
+
/* Find function 1 */
dev1 = pci_get_device(0x1045, 0xC701, NULL);
if(dev1 == NULL)
return 0;
-
+
/* Rev must be >= 0x10 */
pci_read_config_byte(dev1, 0x08, &r);
if (r < 0x10)
pci_read_config_byte(dev1, 0x52, &r);
if (r & 0x80) /* IDEDIR disabled */
ret = 1;
-done:
+done:
printk(KERN_WARNING "UDMA not supported in this configuration.\n");
done_nomsg: /* Wrong chip revision */
pci_dev_put(dev1);
inw(0x1F1);
inw(0x1F1);
pci_clock = inb(0x1F5) & 1; /* 0 = 33Mhz, 1 = 25Mhz */
-
+
if (optiplus_with_udma(dev))
info = &info_82c700_udma;
projects / powerpc.git / blobdiff