static void __iomem * inic_port_base(struct ata_port *ap)
{
- return ap->host->mmio_base + ap->port_no * PORT_SIZE;
+ return ap->host->iomap[MMIO_BAR] + ap->port_no * PORT_SIZE;
}
static void __inic_set_pirq_mask(struct ata_port *ap, u8 mask)
static irqreturn_t inic_interrupt(int irq, void *dev_instance)
{
struct ata_host *host = dev_instance;
- void __iomem *mmio_base = host->mmio_base;
+ void __iomem *mmio_base = host->iomap[MMIO_BAR];
u16 host_irq_stat;
int i, handled = 0;;
/* hammer it into sane state */
inic_reset_port(port_base);
- if (ata_port_offline(ap)) {
- *class = ATA_DEV_NONE;
- return 0;
- }
-
val = readw(idma_ctl);
writew(val | IDMA_CTL_RST_ATA, idma_ctl);
readw(idma_ctl); /* flush */
rc = sata_phy_resume(ap, timing);
if (rc) {
ata_port_printk(ap, KERN_WARNING, "failed to resume "
- "link for reset (errno=%d)\n", rc);
+ "link after reset (errno=%d)\n", rc);
return rc;
}
- msleep(150);
-
*class = ATA_DEV_NONE;
if (ata_port_online(ap)) {
struct ata_taskfile tf;
+ /* wait a while before checking status */
+ msleep(150);
+
if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
ata_port_printk(ap, KERN_WARNING,
"device busy after hardreset\n");
int rc;
/* alloc and initialize private data */
- pp = kzalloc(sizeof(*pp), GFP_KERNEL);
+ pp = devm_kzalloc(ap->host->dev, sizeof(*pp), GFP_KERNEL);
if (!pp)
return -ENOMEM;
ap->private_data = pp;
return 0;
}
-static void inic_port_stop(struct ata_port *ap)
-{
- ata_port_stop(ap);
- kfree(ap->private_data);
-}
-
static struct ata_port_operations inic_port_ops = {
.port_disable = ata_port_disable,
.tf_load = ata_tf_load,
.irq_handler = inic_interrupt,
.irq_clear = inic_irq_clear,
+ .irq_on = ata_irq_on,
+ .irq_ack = ata_irq_ack,
.qc_prep = ata_qc_prep,
.qc_issue = inic_qc_issue,
- .data_xfer = ata_pio_data_xfer,
+ .data_xfer = ata_data_xfer,
.freeze = inic_freeze,
.thaw = inic_thaw,
.port_resume = inic_port_resume,
.port_start = inic_port_start,
- .port_stop = inic_port_stop,
- .host_stop = ata_pci_host_stop
};
static struct ata_port_info inic_port_info = {
{
struct ata_host *host = dev_get_drvdata(&pdev->dev);
struct inic_host_priv *hpriv = host->private_data;
- void __iomem *mmio_base = host->mmio_base;
+ void __iomem *mmio_base = host->iomap[MMIO_BAR];
int rc;
ata_pci_device_do_resume(pdev);
struct ata_port_info *pinfo = &inic_port_info;
struct ata_probe_ent *probe_ent;
struct inic_host_priv *hpriv;
- void __iomem *mmio_base;
+ void __iomem * const *iomap;
int i, rc;
if (!printed_version++)
dev_printk(KERN_DEBUG, &pdev->dev, "version " DRV_VERSION "\n");
- rc = pci_enable_device(pdev);
+ rc = pcim_enable_device(pdev);
if (rc)
return rc;
rc = pci_request_regions(pdev, DRV_NAME);
if (rc)
- goto err_out;
+ return rc;
- rc = -ENOMEM;
- mmio_base = pci_iomap(pdev, MMIO_BAR, 0);
- if (!mmio_base)
- goto err_out_regions;
+ rc = pcim_iomap_regions(pdev, 0x3f, DRV_NAME);
+ if (rc)
+ return rc;
+ iomap = pcim_iomap_table(pdev);
/* Set dma_mask. This devices doesn't support 64bit addressing. */
rc = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
if (rc) {
dev_printk(KERN_ERR, &pdev->dev,
"32-bit DMA enable failed\n");
- goto err_out_map;
+ return rc;
}
rc = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
if (rc) {
dev_printk(KERN_ERR, &pdev->dev,
"32-bit consistent DMA enable failed\n");
- goto err_out_map;
+ return rc;
}
- rc = -ENOMEM;
- probe_ent = kzalloc(sizeof(*probe_ent), GFP_KERNEL);
- if (!probe_ent)
- goto err_out_map;
-
- hpriv = kzalloc(sizeof(*hpriv), GFP_KERNEL);
- if (!hpriv)
- goto err_out_ent;
+ probe_ent = devm_kzalloc(&pdev->dev, sizeof(*probe_ent), GFP_KERNEL);
+ hpriv = devm_kzalloc(&pdev->dev, sizeof(*hpriv), GFP_KERNEL);
+ if (!probe_ent || !hpriv)
+ return -ENOMEM;
probe_ent->dev = &pdev->dev;
INIT_LIST_HEAD(&probe_ent->node);
probe_ent->irq = pdev->irq;
probe_ent->irq_flags = SA_SHIRQ;
- probe_ent->mmio_base = mmio_base;
+ probe_ent->iomap = iomap;
for (i = 0; i < NR_PORTS; i++) {
struct ata_ioports *port = &probe_ent->port[i];
- unsigned long port_base =
- (unsigned long)mmio_base + i * PORT_SIZE;
+ void __iomem *port_base = iomap[MMIO_BAR] + i * PORT_SIZE;
- port->cmd_addr = pci_resource_start(pdev, 2 * i);
+ port->cmd_addr = iomap[2 * i];
port->altstatus_addr =
- port->ctl_addr =
- pci_resource_start(pdev, 2 * i + 1) | ATA_PCI_CTL_OFS;
+ port->ctl_addr = (void __iomem *)
+ ((unsigned long)iomap[2 * i + 1] | ATA_PCI_CTL_OFS);
port->scr_addr = port_base + PORT_SCR;
ata_std_ports(port);
}
probe_ent->private_data = hpriv;
- hpriv->cached_hctl = readw(mmio_base + HOST_CTL);
+ hpriv->cached_hctl = readw(iomap[MMIO_BAR] + HOST_CTL);
- rc = init_controller(mmio_base, hpriv->cached_hctl);
+ rc = init_controller(iomap[MMIO_BAR], hpriv->cached_hctl);
if (rc) {
dev_printk(KERN_ERR, &pdev->dev,
"failed to initialize controller\n");
- goto err_out_hpriv;
+ return rc;
}
pci_set_master(pdev);
- rc = -ENODEV;
if (!ata_device_add(probe_ent))
- goto err_out_hpriv;
+ return -ENODEV;
- kfree(probe_ent);
+ devm_kfree(&pdev->dev, probe_ent);
return 0;
-
- err_out_hpriv:
- kfree(hpriv);
- err_out_ent:
- kfree(probe_ent);
- err_out_map:
- pci_iounmap(pdev, mmio_base);
- err_out_regions:
- pci_release_regions(pdev);
- err_out:
- pci_disable_device(pdev);
- return rc;
}
static const struct pci_device_id inic_pci_tbl[] = {