{
for ( ; drive_table->id_model ; drive_table++)
if ((!strcmp(drive_table->id_model, id->model)) &&
- ((strstr(drive_table->id_firmware, id->fw_rev)) ||
+ ((strstr(id->fw_rev, drive_table->id_firmware)) ||
(!strcmp(drive_table->id_firmware, "ALL"))))
return 1;
return 0;
}
-EXPORT_SYMBOL_GPL(ide_in_drive_list);
-
/**
* ide_dma_intr - IDE DMA interrupt handler
* @drive: the drive the interrupt is for
static int config_drive_for_dma (ide_drive_t *drive)
{
struct hd_driveid *id = drive->id;
- ide_hwif_t *hwif = HWIF(drive);
- if ((id->capability & 1) && hwif->autodma) {
+ if ((id->capability & 1) && drive->hwif->autodma) {
/*
* Enable DMA on any drive that has
* UltraDMA (mode 0/1/2/3/4/5/6) enabled
*/
if ((id->field_valid & 4) && ((id->dma_ultra >> 8) & 0x7f))
- return hwif->ide_dma_on(drive);
+ return 0;
/*
* Enable DMA on any drive that has mode2 DMA
* (multi or single) enabled
if (id->field_valid & 2) /* regular DMA */
if ((id->dma_mword & 0x404) == 0x404 ||
(id->dma_1word & 0x404) == 0x404)
- return hwif->ide_dma_on(drive);
+ return 0;
/* Consult the list of known "good" drives */
if (__ide_dma_good_drive(drive))
- return hwif->ide_dma_on(drive);
+ return 0;
}
-// if (hwif->tuneproc != NULL) hwif->tuneproc(drive, 255);
- return hwif->ide_dma_off_quietly(drive);
+
+ return -1;
}
/**
}
/**
- * __ide_dma_host_off - Generic DMA kill
+ * ide_dma_host_off - Generic DMA kill
* @drive: drive to control
*
* Perform the generic IDE controller DMA off operation. This
* works for most IDE bus mastering controllers
*/
-int __ide_dma_host_off (ide_drive_t *drive)
+void ide_dma_host_off(ide_drive_t *drive)
{
ide_hwif_t *hwif = HWIF(drive);
u8 unit = (drive->select.b.unit & 0x01);
u8 dma_stat = hwif->INB(hwif->dma_status);
hwif->OUTB((dma_stat & ~(1<<(5+unit))), hwif->dma_status);
- return 0;
}
-EXPORT_SYMBOL(__ide_dma_host_off);
+EXPORT_SYMBOL(ide_dma_host_off);
/**
- * __ide_dma_host_off_quietly - Generic DMA kill
+ * ide_dma_off_quietly - Generic DMA kill
* @drive: drive to control
*
* Turn off the current DMA on this IDE controller.
*/
-int __ide_dma_off_quietly (ide_drive_t *drive)
+void ide_dma_off_quietly(ide_drive_t *drive)
{
drive->using_dma = 0;
ide_toggle_bounce(drive, 0);
- if (HWIF(drive)->ide_dma_host_off(drive))
- return 1;
-
- return 0;
+ drive->hwif->dma_host_off(drive);
}
-EXPORT_SYMBOL(__ide_dma_off_quietly);
+EXPORT_SYMBOL(ide_dma_off_quietly);
#endif /* CONFIG_BLK_DEV_IDEDMA_PCI */
/**
- * __ide_dma_off - disable DMA on a device
+ * ide_dma_off - disable DMA on a device
* @drive: drive to disable DMA on
*
* Disable IDE DMA for a device on this IDE controller.
* Inform the user that DMA has been disabled.
*/
-int __ide_dma_off (ide_drive_t *drive)
+void ide_dma_off(ide_drive_t *drive)
{
printk(KERN_INFO "%s: DMA disabled\n", drive->name);
- return HWIF(drive)->ide_dma_off_quietly(drive);
+ drive->hwif->dma_off_quietly(drive);
}
-EXPORT_SYMBOL(__ide_dma_off);
+EXPORT_SYMBOL(ide_dma_off);
#ifdef CONFIG_BLK_DEV_IDEDMA_PCI
/**
- * __ide_dma_host_on - Enable DMA on a host
+ * ide_dma_host_on - Enable DMA on a host
* @drive: drive to enable for DMA
*
* Enable DMA on an IDE controller following generic bus mastering
* IDE controller behaviour
*/
-
-int __ide_dma_host_on (ide_drive_t *drive)
+
+void ide_dma_host_on(ide_drive_t *drive)
{
if (drive->using_dma) {
ide_hwif_t *hwif = HWIF(drive);
u8 dma_stat = hwif->INB(hwif->dma_status);
hwif->OUTB((dma_stat|(1<<(5+unit))), hwif->dma_status);
- return 0;
}
- return 1;
}
-EXPORT_SYMBOL(__ide_dma_host_on);
+EXPORT_SYMBOL(ide_dma_host_on);
/**
* __ide_dma_on - Enable DMA on a device
drive->using_dma = 1;
ide_toggle_bounce(drive, 1);
- if (HWIF(drive)->ide_dma_host_on(drive))
- return 1;
+ drive->hwif->dma_host_on(drive);
return 0;
}
}
/* PRD table */
- hwif->OUTL(hwif->dmatable_dma, hwif->dma_prdtable);
+ if (hwif->mmio)
+ writel(hwif->dmatable_dma, (void __iomem *)hwif->dma_prdtable);
+ else
+ outl(hwif->dmatable_dma, hwif->dma_prdtable);
/* specify r/w */
hwif->OUTB(reading, hwif->dma_command);
struct hd_driveid *id = drive->id;
ide_hwif_t *hwif = drive->hwif;
+ if ((id->capability & 1) == 0 || drive->autodma == 0)
+ return 0;
+
/* consult the list of known "bad" drives */
if (__ide_dma_bad_drive(drive))
return 0;
EXPORT_SYMBOL_GPL(ide_use_dma);
+static const u8 xfer_mode_bases[] = {
+ XFER_UDMA_0,
+ XFER_MW_DMA_0,
+ XFER_SW_DMA_0,
+};
+
+static unsigned int ide_get_mode_mask(ide_drive_t *drive, u8 base)
+{
+ struct hd_driveid *id = drive->id;
+ ide_hwif_t *hwif = drive->hwif;
+ unsigned int mask = 0;
+
+ switch(base) {
+ case XFER_UDMA_0:
+ if ((id->field_valid & 4) == 0)
+ break;
+
+ mask = id->dma_ultra & hwif->ultra_mask;
+
+ if (hwif->udma_filter)
+ mask &= hwif->udma_filter(drive);
+
+ if ((mask & 0x78) && (eighty_ninty_three(drive) == 0))
+ mask &= 0x07;
+ break;
+ case XFER_MW_DMA_0:
+ mask = id->dma_mword & hwif->mwdma_mask;
+ break;
+ case XFER_SW_DMA_0:
+ mask = id->dma_1word & hwif->swdma_mask;
+ break;
+ default:
+ BUG();
+ break;
+ }
+
+ return mask;
+}
+
+/**
+ * ide_max_dma_mode - compute DMA speed
+ * @drive: IDE device
+ *
+ * Checks the drive capabilities and returns the speed to use
+ * for the DMA transfer. Returns 0 if the drive is incapable
+ * of DMA transfers.
+ */
+
+u8 ide_max_dma_mode(ide_drive_t *drive)
+{
+ ide_hwif_t *hwif = drive->hwif;
+ unsigned int mask;
+ int x, i;
+ u8 mode = 0;
+
+ if (drive->media != ide_disk && hwif->atapi_dma == 0)
+ return 0;
+
+ for (i = 0; i < ARRAY_SIZE(xfer_mode_bases); i++) {
+ mask = ide_get_mode_mask(drive, xfer_mode_bases[i]);
+ x = fls(mask) - 1;
+ if (x >= 0) {
+ mode = xfer_mode_bases[i] + x;
+ break;
+ }
+ }
+
+ printk(KERN_DEBUG "%s: selected mode 0x%x\n", drive->name, mode);
+
+ return mode;
+}
+
+EXPORT_SYMBOL_GPL(ide_max_dma_mode);
+
+int ide_tune_dma(ide_drive_t *drive)
+{
+ u8 speed;
+
+ /* TODO: use only ide_max_dma_mode() */
+ if (!ide_use_dma(drive))
+ return 0;
+
+ speed = ide_max_dma_mode(drive);
+
+ if (!speed)
+ return 0;
+
+ drive->hwif->speedproc(drive, speed);
+
+ return ide_dma_enable(drive);
+}
+
+EXPORT_SYMBOL_GPL(ide_tune_dma);
+
void ide_dma_verbose(ide_drive_t *drive)
{
struct hd_driveid *id = drive->id;
return;
bug_dma_off:
printk(", BUG DMA OFF");
- hwif->ide_dma_off_quietly(drive);
+ hwif->dma_off_quietly(drive);
return;
}
EXPORT_SYMBOL(ide_dma_verbose);
+int ide_set_dma(ide_drive_t *drive)
+{
+ ide_hwif_t *hwif = drive->hwif;
+ int rc;
+
+ rc = hwif->ide_dma_check(drive);
+
+ switch(rc) {
+ case -1: /* DMA needs to be disabled */
+ hwif->dma_off_quietly(drive);
+ return -1;
+ case 0: /* DMA needs to be enabled */
+ return hwif->ide_dma_on(drive);
+ case 1: /* DMA setting cannot be changed */
+ break;
+ default:
+ BUG();
+ break;
+ }
+
+ return rc;
+}
+
+EXPORT_SYMBOL_GPL(ide_set_dma);
+
#ifdef CONFIG_BLK_DEV_IDEDMA_PCI
int __ide_dma_lostirq (ide_drive_t *drive)
{
release_region(hwif->dma_base, 8);
if (hwif->extra_ports)
release_region(hwif->extra_base, hwif->extra_ports);
- if (hwif->dma_base2)
- release_region(hwif->dma_base, 8);
return 1;
}
/*
* Needed for allowing full modular support of ide-driver
*/
-int ide_release_dma (ide_hwif_t *hwif)
+int ide_release_dma(ide_hwif_t *hwif)
{
- if (hwif->mmio == 2)
- return 1;
- if (hwif->chipset == ide_etrax100)
- return 1;
-
ide_release_dma_engine(hwif);
- return ide_release_iomio_dma(hwif);
+
+ if (hwif->mmio)
+ return 1;
+ else
+ return ide_release_iomio_dma(hwif);
}
static int ide_allocate_dma_engine(ide_hwif_t *hwif)
if (hwif->dmatable_cpu)
return 0;
- printk(KERN_ERR "%s: -- Error, unable to allocate%s DMA table(s).\n",
- hwif->cds->name, !hwif->dmatable_cpu ? " CPU" : "");
+ printk(KERN_ERR "%s: -- Error, unable to allocate DMA table.\n",
+ hwif->cds->name);
- ide_release_dma_engine(hwif);
return 1;
}
}
if(hwif->mate)
- hwif->dma_master = (hwif->channel) ? hwif->mate->dma_base : base;
+ hwif->dma_master = (hwif->channel) ? hwif->mate->dma_base:base;
else
hwif->dma_master = base;
- if (hwif->dma_base2) {
- if (!request_region(hwif->dma_base2, ports, hwif->name))
- {
- printk(" -- Error, secondary ports in use.\n");
- release_region(base, ports);
- if (hwif->extra_ports)
- release_region(hwif->extra_base, hwif->extra_ports);
- return 1;
- }
- }
return 0;
}
static int ide_dma_iobase(ide_hwif_t *hwif, unsigned long base, unsigned int ports)
{
- if (hwif->mmio == 2)
+ if (hwif->mmio)
return ide_mapped_mmio_dma(hwif, base,ports);
- BUG_ON(hwif->mmio == 1);
+
return ide_iomio_dma(hwif, base, ports);
}
if (!(hwif->dma_prdtable))
hwif->dma_prdtable = (hwif->dma_base + 4);
- if (!hwif->ide_dma_off_quietly)
- hwif->ide_dma_off_quietly = &__ide_dma_off_quietly;
- if (!hwif->ide_dma_host_off)
- hwif->ide_dma_host_off = &__ide_dma_host_off;
+ if (!hwif->dma_off_quietly)
+ hwif->dma_off_quietly = &ide_dma_off_quietly;
+ if (!hwif->dma_host_off)
+ hwif->dma_host_off = &ide_dma_host_off;
if (!hwif->ide_dma_on)
hwif->ide_dma_on = &__ide_dma_on;
- if (!hwif->ide_dma_host_on)
- hwif->ide_dma_host_on = &__ide_dma_host_on;
+ if (!hwif->dma_host_on)
+ hwif->dma_host_on = &ide_dma_host_on;
if (!hwif->ide_dma_check)
hwif->ide_dma_check = &__ide_dma_check;
if (!hwif->dma_setup)