sky2: backout NAPI reschedule
[powerpc.git] / drivers / ieee1394 / ohci1394.c
index b6b96fa..1922287 100644 (file)
@@ -544,12 +544,19 @@ static void ohci_initialize(struct ti_ohci *ohci)
        /* Initialize IR Legacy DMA channel mask */
        ohci->ir_legacy_channels = 0;
 
-       /*
-        * Accept AT requests from all nodes. This probably
-        * will have to be controlled from the subsystem
-        * on a per node basis.
-        */
-       reg_write(ohci,OHCI1394_AsReqFilterHiSet, 0x80000000);
+       /* Accept AR requests from all nodes */
+       reg_write(ohci, OHCI1394_AsReqFilterHiSet, 0x80000000);
+
+       /* Set the address range of the physical response unit.
+        * Most controllers do not implement it as a writable register though.
+        * They will keep a hardwired offset of 0x00010000 and show 0x0 as
+        * register content.
+        * To actually enable physical responses is the job of our interrupt
+        * handler which programs the physical request filter. */
+       reg_write(ohci, OHCI1394_PhyUpperBound, 0xffff0000);
+
+       DBGMSG("physUpperBoundOffset=%08x",
+              reg_read(ohci, OHCI1394_PhyUpperBound));
 
        /* Specify AT retries */
        reg_write(ohci, OHCI1394_ATRetries,
@@ -572,6 +579,7 @@ static void ohci_initialize(struct ti_ohci *ohci)
                  OHCI1394_reqTxComplete |
                  OHCI1394_isochRx |
                  OHCI1394_isochTx |
+                 OHCI1394_postedWriteErr |
                  OHCI1394_cycleInconsistent);
 
        /* Enable link */
@@ -2374,7 +2382,10 @@ static irqreturn_t ohci_irq_handler(int irq, void *dev_id,
 
                event &= ~OHCI1394_unrecoverableError;
        }
-
+       if (event & OHCI1394_postedWriteErr) {
+               PRINT(KERN_ERR, "physical posted write error");
+               /* no recovery strategy yet, had to involve protocol drivers */
+       }
        if (event & OHCI1394_cycleInconsistent) {
                /* We subscribe to the cycleInconsistent event only to
                 * clear the corresponding event bit... otherwise,
@@ -2382,7 +2393,6 @@ static irqreturn_t ohci_irq_handler(int irq, void *dev_id,
                DBGMSG("OHCI1394_cycleInconsistent");
                event &= ~OHCI1394_cycleInconsistent;
        }
-
        if (event & OHCI1394_busReset) {
                /* The busReset event bit can't be cleared during the
                 * selfID phase, so we disable busReset interrupts, to
@@ -2426,7 +2436,6 @@ static irqreturn_t ohci_irq_handler(int irq, void *dev_id,
                }
                event &= ~OHCI1394_busReset;
        }
-
        if (event & OHCI1394_reqTxComplete) {
                struct dma_trm_ctx *d = &ohci->at_req_context;
                DBGMSG("Got reqTxComplete interrupt "
@@ -2514,26 +2523,20 @@ static irqreturn_t ohci_irq_handler(int irq, void *dev_id,
                        reg_write(ohci, OHCI1394_IntMaskSet, OHCI1394_busReset);
                        spin_unlock_irqrestore(&ohci->event_lock, flags);
 
-                       /* Accept Physical requests from all nodes. */
-                       reg_write(ohci,OHCI1394_AsReqFilterHiSet, 0xffffffff);
-                       reg_write(ohci,OHCI1394_AsReqFilterLoSet, 0xffffffff);
-
                        /* Turn on phys dma reception.
                         *
                         * TODO: Enable some sort of filtering management.
                         */
                        if (phys_dma) {
-                               reg_write(ohci,OHCI1394_PhyReqFilterHiSet, 0xffffffff);
-                               reg_write(ohci,OHCI1394_PhyReqFilterLoSet, 0xffffffff);
-                               reg_write(ohci,OHCI1394_PhyUpperBound, 0xffff0000);
-                       } else {
-                               reg_write(ohci,OHCI1394_PhyReqFilterHiSet, 0x00000000);
-                               reg_write(ohci,OHCI1394_PhyReqFilterLoSet, 0x00000000);
+                               reg_write(ohci, OHCI1394_PhyReqFilterHiSet,
+                                         0xffffffff);
+                               reg_write(ohci, OHCI1394_PhyReqFilterLoSet,
+                                         0xffffffff);
                        }
 
                        DBGMSG("PhyReqFilter=%08x%08x",
-                              reg_read(ohci,OHCI1394_PhyReqFilterHiSet),
-                              reg_read(ohci,OHCI1394_PhyReqFilterLoSet));
+                              reg_read(ohci, OHCI1394_PhyReqFilterHiSet),
+                              reg_read(ohci, OHCI1394_PhyReqFilterLoSet));
 
                        hpsb_selfid_complete(host, phyid, isroot);
                } else
@@ -3259,8 +3262,8 @@ static int __devinit ohci1394_pci_probe(struct pci_dev *dev,
         * fail to report the right length.  Anyway, the ohci spec
         * clearly says it's 2kb, so this shouldn't be a problem. */
        ohci_base = pci_resource_start(dev, 0);
-       if (pci_resource_len(dev, 0) != OHCI1394_REGISTER_SIZE)
-               PRINT(KERN_WARNING, "Unexpected PCI resource length of %lx!",
+       if (pci_resource_len(dev, 0) < OHCI1394_REGISTER_SIZE)
+               PRINT(KERN_WARNING, "PCI resource length of %lx too small!",
                      pci_resource_len(dev, 0));
 
        /* Seems PCMCIA handles this internally. Not sure why. Seems
@@ -3526,7 +3529,7 @@ static void ohci1394_pci_remove(struct pci_dev *pdev)
 static int ohci1394_pci_resume (struct pci_dev *pdev)
 {
 #ifdef CONFIG_PPC_PMAC
-       if (_machine == _MACH_Pmac) {
+       if (machine_is(powermac)) {
                struct device_node *of_node;
 
                /* Re-enable 1394 */
@@ -3545,7 +3548,7 @@ static int ohci1394_pci_resume (struct pci_dev *pdev)
 static int ohci1394_pci_suspend (struct pci_dev *pdev, pm_message_t state)
 {
 #ifdef CONFIG_PPC_PMAC
-       if (_machine == _MACH_Pmac) {
+       if (machine_is(powermac)) {
                struct device_node *of_node;
 
                /* Disable 1394 */