physically into the CPU's memory. The mapping description here is
taken from OF device tree.
+config MTD_PMC_MSP_EVM
+ tristate "CFI Flash device mapped on PMC-Sierra MSP"
+ depends on PMC_MSP && MTD_CFI
+ select MTD_PARTITIONS
+ help
+ This provides a 'mapping' driver which support the way
+ in which user-programmable flash chips are connected on the
+ PMC-Sierra MSP eval/demo boards
+
+choice
+ prompt "Maximum mappable memory avialable for flash IO"
+ depends on MTD_PMC_MSP_EVM
+ default MSP_FLASH_MAP_LIMIT_32M
+
+config MSP_FLASH_MAP_LIMIT_32M
+ bool "32M"
+
+endchoice
+
+config MSP_FLASH_MAP_LIMIT
+ hex
+ default "0x02000000"
+ depends on MSP_FLASH_MAP_LIMIT_32M
+
+config MTD_PMC_MSP_RAMROOT
+ tristate "Embedded RAM block device for root on PMC-Sierra MSP"
+ depends on PMC_MSP_EMBEDDED_ROOTFS && \
+ (MTD_BLOCK || MTD_BLOCK_RO) && \
+ MTD_RAM
+ help
+ This provides support for the embedded root file system
+ on PMC MSP devices. This memory is mapped as a MTD block device.
+
config MTD_SUN_UFLASH
tristate "Sun Microsystems userflash support"
depends on SPARC && MTD_CFI
config MTD_ALCHEMY
tristate "AMD Alchemy Pb1xxx/Db1xxx/RDK MTD support"
- depends on SOC_AU1X00
+ depends on SOC_AU1X00 && MTD_PARTITIONS && MTD_CFI
help
Flash memory access on AMD Alchemy Pb/Db/RDK Reference Boards
config MTD_MTX1
tristate "4G Systems MTX-1 Flash device"
- depends on MIPS && MIPS_MTX1
+ depends on MIPS_MTX1 && MTD_CFI
help
Flash memory access on 4G Systems MTX-1 Board. If you have one of
these boards and would like to use the flash chips on it, say 'Y'.
config MTD_OCELOT
tristate "Momenco Ocelot boot flash device"
- depends on MIPS && MOMENCO_OCELOT
+ depends on MOMENCO_OCELOT
help
This enables access routines for the boot flash device and for the
NVRAM on the Momenco Ocelot board. If you have one of these boards