#endif
/* Define default oob placement schemes for large and small page devices */
-static struct nand_oobinfo nand_oob_8 = {
- .useecc = MTD_NANDECC_AUTOPLACE,
+static struct nand_ecclayout nand_oob_8 = {
.eccbytes = 3,
.eccpos = {0, 1, 2},
- .oobfree = {{3, 2}, {6, 2}}
+ .oobfree = {
+ {.offset = 3,
+ .length = 2},
+ {.offset = 6,
+ .length = 2}}
};
-static struct nand_oobinfo nand_oob_16 = {
- .useecc = MTD_NANDECC_AUTOPLACE,
+static struct nand_ecclayout nand_oob_16 = {
.eccbytes = 6,
.eccpos = {0, 1, 2, 3, 6, 7},
- .oobfree = {{8, 8}}
+ .oobfree = {
+ {.offset = 8,
+ . length = 8}}
};
-static struct nand_oobinfo nand_oob_64 = {
- .useecc = MTD_NANDECC_AUTOPLACE,
+static struct nand_ecclayout nand_oob_64 = {
.eccbytes = 24,
.eccpos = {
40, 41, 42, 43, 44, 45, 46, 47,
48, 49, 50, 51, 52, 53, 54, 55,
56, 57, 58, 59, 60, 61, 62, 63},
- .oobfree = {{2, 38}}
+ .oobfree = {
+ {.offset = 2,
+ .length = 38}}
};
-/* This is used for padding purposes in nand_write_oob */
-static uint8_t ffchars[] = {
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-};
-
-/*
- * NAND low-level MTD interface functions
- */
-static void nand_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len);
-static void nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len);
-static int nand_verify_buf(struct mtd_info *mtd, const uint8_t *buf, int len);
-
-static int nand_read(struct mtd_info *mtd, loff_t from, size_t len,
- size_t *retlen, uint8_t *buf);
-static int nand_read_oob(struct mtd_info *mtd, loff_t from, size_t len,
- size_t *retlen, uint8_t *buf);
-static int nand_write(struct mtd_info *mtd, loff_t to, size_t len,
- size_t *retlen, const uint8_t *buf);
-static int nand_write_oob(struct mtd_info *mtd, loff_t to, size_t len,
- size_t *retlen, const uint8_t *buf);
-static int nand_erase(struct mtd_info *mtd, struct erase_info *instr);
-static void nand_sync(struct mtd_info *mtd);
-
-/* Some internal functions */
-static int nand_write_page(struct mtd_info *mtd, struct nand_chip *chip,
- int page, uint8_t * oob_buf,
- struct nand_oobinfo *oobsel, int mode);
-#ifdef CONFIG_MTD_NAND_VERIFY_WRITE
-static int nand_verify_pages(struct mtd_info *mtd, struct nand_chip *chip,
- int page, int numpages, uint8_t *oob_buf,
- struct nand_oobinfo *oobsel, int chipnr,
- int oobmode);
-#else
-#define nand_verify_pages(...) (0)
-#endif
-
static int nand_get_device(struct nand_chip *chip, struct mtd_info *mtd,
int new_state);
+static int nand_do_write_oob(struct mtd_info *mtd, loff_t to,
+ struct mtd_oob_ops *ops);
+
/*
* For devices which display every fart in the system on a seperate LED. Is
* compiled away when LED support is disabled.
/**
* nand_select_chip - [DEFAULT] control CE line
* @mtd: MTD device structure
- * @chip: chipnumber to select, -1 for deselect
+ * @chipnr: chipnumber to select, -1 for deselect
*
* Default select function for 1 chip devices.
*/
chip->cmd_ctrl(mtd, NAND_CMD_NONE, 0 | NAND_CTRL_CHANGE);
break;
case 0:
- chip->cmd_ctrl(mtd, NAND_CMD_NONE,
- NAND_NCE | NAND_CTRL_CHANGE);
break;
default:
for (i = 0; i < len; i++)
if (buf[i] != readb(chip->IO_ADDR_R))
return -EFAULT;
-
return 0;
}
{
struct nand_chip *chip = mtd->priv;
uint8_t buf[2] = { 0, 0 };
- size_t retlen;
- int block;
+ int block, ret;
/* Get block number */
block = ((int)ofs) >> chip->bbt_erase_shift;
/* Do we have a flash based bad block table ? */
if (chip->options & NAND_USE_FLASH_BBT)
- return nand_update_bbt(mtd, ofs);
+ ret = nand_update_bbt(mtd, ofs);
+ else {
+ /* We write two bytes, so we dont have to mess with 16 bit
+ * access
+ */
+ ofs += mtd->oobsize;
+ chip->ops.len = 2;
+ chip->ops.datbuf = NULL;
+ chip->ops.oobbuf = buf;
+ chip->ops.ooboffs = chip->badblockpos & ~0x01;
- /* We write two bytes, so we dont have to mess with 16 bit access */
- ofs += mtd->oobsize + (chip->badblockpos & ~0x01);
- return nand_write_oob(mtd, ofs, 2, &retlen, buf);
+ ret = nand_do_write_oob(mtd, ofs, &chip->ops);
+ }
+ if (!ret)
+ mtd->ecc_stats.badblocks++;
+ return ret;
}
/**
case NAND_CMD_ERASE2:
case NAND_CMD_SEQIN:
case NAND_CMD_STATUS:
- chip->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE);
return;
case NAND_CMD_RESET:
* Send command to NAND device. This is the version for the new large page
* devices We dont have the separate regions as we have in the small page
* devices. We must emulate NAND_CMD_READOOB to keep the code compatible.
- *
*/
static void nand_command_lp(struct mtd_info *mtd, unsigned int command,
int column, int page_addr)
case NAND_CMD_ERASE1:
case NAND_CMD_ERASE2:
case NAND_CMD_SEQIN:
+ case NAND_CMD_RNDIN:
case NAND_CMD_STATUS:
case NAND_CMD_DEPLETE1:
return;
while (!(chip->read_byte(mtd) & NAND_STATUS_READY)) ;
return;
+ case NAND_CMD_RNDOUT:
+ /* No ready / busy check necessary */
+ chip->cmd_ctrl(mtd, NAND_CMD_RNDOUTSTART,
+ NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE);
+ chip->cmd_ctrl(mtd, NAND_CMD_NONE,
+ NAND_NCE | NAND_CTRL_CHANGE);
+ return;
+
case NAND_CMD_READ0:
chip->cmd_ctrl(mtd, NAND_CMD_READSTART,
NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE);
/**
* nand_get_device - [GENERIC] Get chip for selected access
- * @this: the nand chip descriptor
+ * @chip: the nand chip descriptor
* @mtd: MTD device structure
* @new_state: the state which is requested
*
/**
* nand_wait - [DEFAULT] wait until the command is done
* @mtd: MTD device structure
- * @this: NAND chip structure
- * @state: state to select the max. timeout value
+ * @chip: NAND chip structure
*
* Wait for command done. This applies to erase and program only
* Erase can take up to 400ms and program up to 20ms according to
* general NAND and SmartMedia specs
- *
-*/
-static int nand_wait(struct mtd_info *mtd, struct nand_chip *chip, int state)
+ */
+static int nand_wait(struct mtd_info *mtd, struct nand_chip *chip)
{
unsigned long timeo = jiffies;
- int status;
+ int status, state = chip->state;
if (state == FL_ERASING)
timeo += (HZ * 400) / 1000;
chip->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1);
while (time_before(jiffies, timeo)) {
- /* Check, if we were interrupted */
- if (chip->state != state)
- return 0;
-
if (chip->dev_ready) {
if (chip->dev_ready(mtd))
break;
}
/**
- * nand_write_page - [GENERIC] write one page
- * @mtd: MTD device structure
- * @this: NAND chip structure
- * @page: startpage inside the chip, must be called with (page & chip->pagemask)
- * @oob_buf: out of band data buffer
- * @oobsel: out of band selecttion structre
- * @cached: 1 = enable cached programming if supported by chip
- *
- * Nand_page_program function is used for write and writev !
- * This function will always program a full page of data
- * If you call it with a non page aligned buffer, you're lost :)
- *
- * Cached programming is not supported yet.
+ * nand_read_page_raw - [Intern] read raw page data without ecc
+ * @mtd: mtd info structure
+ * @chip: nand chip info structure
+ * @buf: buffer to store read data
*/
-static int nand_write_page(struct mtd_info *mtd, struct nand_chip *chip, int page,
- uint8_t *oob_buf, struct nand_oobinfo *oobsel, int cached)
+static int nand_read_page_raw(struct mtd_info *mtd, struct nand_chip *chip,
+ uint8_t *buf)
{
- int i, status;
- uint8_t ecc_code[32];
- int eccmode = oobsel->useecc ? chip->ecc.mode : NAND_ECC_NONE;
- int *oob_config = oobsel->eccpos;
- int datidx = 0, eccidx = 0, eccsteps = chip->ecc.steps;
- int eccbytes = 0;
-
- /* FIXME: Enable cached programming */
- cached = 0;
+ chip->read_buf(mtd, buf, mtd->writesize);
+ chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);
+ return 0;
+}
- /* Send command to begin auto page programming */
- chip->cmdfunc(mtd, NAND_CMD_SEQIN, 0x00, page);
+/**
+ * nand_read_page_swecc - {REPLACABLE] software ecc based page read function
+ * @mtd: mtd info structure
+ * @chip: nand chip info structure
+ * @buf: buffer to store read data
+ */
+static int nand_read_page_swecc(struct mtd_info *mtd, struct nand_chip *chip,
+ uint8_t *buf)
+{
+ int i, eccsize = chip->ecc.size;
+ int eccbytes = chip->ecc.bytes;
+ int eccsteps = chip->ecc.steps;
+ uint8_t *p = buf;
+ uint8_t *ecc_calc = chip->buffers.ecccalc;
+ uint8_t *ecc_code = chip->buffers.ecccode;
+ int *eccpos = chip->ecc.layout->eccpos;
- /* Write out complete page of data, take care of eccmode */
- switch (eccmode) {
- /* No ecc, write all */
- case NAND_ECC_NONE:
- printk(KERN_WARNING "Writing data without ECC to NAND-FLASH is not recommended\n");
- chip->write_buf(mtd, chip->data_poi, mtd->writesize);
- break;
+ nand_read_page_raw(mtd, chip, buf);
- /* Software ecc 3/256, write all */
- case NAND_ECC_SOFT:
- for (; eccsteps; eccsteps--) {
- chip->ecc.calculate(mtd, &chip->data_poi[datidx], ecc_code);
- for (i = 0; i < 3; i++, eccidx++)
- oob_buf[oob_config[eccidx]] = ecc_code[i];
- datidx += chip->ecc.size;
- }
- chip->write_buf(mtd, chip->data_poi, mtd->writesize);
- break;
- default:
- eccbytes = chip->ecc.bytes;
- for (; eccsteps; eccsteps--) {
- /* enable hardware ecc logic for write */
- chip->ecc.hwctl(mtd, NAND_ECC_WRITE);
- chip->write_buf(mtd, &chip->data_poi[datidx], chip->ecc.size);
- chip->ecc.calculate(mtd, &chip->data_poi[datidx], ecc_code);
- for (i = 0; i < eccbytes; i++, eccidx++)
- oob_buf[oob_config[eccidx]] = ecc_code[i];
- /* If the hardware ecc provides syndromes then
- * the ecc code must be written immidiately after
- * the data bytes (words) */
- if (chip->options & NAND_HWECC_SYNDROME)
- chip->write_buf(mtd, ecc_code, eccbytes);
- datidx += chip->ecc.size;
- }
- break;
+ for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize)
+ chip->ecc.calculate(mtd, p, &ecc_calc[i]);
+
+ for (i = 0; i < chip->ecc.total; i++)
+ ecc_code[i] = chip->oob_poi[eccpos[i]];
+
+ eccsteps = chip->ecc.steps;
+ p = buf;
+
+ for (i = 0 ; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
+ int stat;
+
+ stat = chip->ecc.correct(mtd, p, &ecc_code[i], &ecc_calc[i]);
+ if (stat == -1)
+ mtd->ecc_stats.failed++;
+ else
+ mtd->ecc_stats.corrected += stat;
}
+ return 0;
+}
- /* Write out OOB data */
- if (chip->options & NAND_HWECC_SYNDROME)
- chip->write_buf(mtd, &oob_buf[oobsel->eccbytes], mtd->oobsize - oobsel->eccbytes);
- else
- chip->write_buf(mtd, oob_buf, mtd->oobsize);
+/**
+ * nand_read_page_hwecc - {REPLACABLE] hardware ecc based page read function
+ * @mtd: mtd info structure
+ * @chip: nand chip info structure
+ * @buf: buffer to store read data
+ *
+ * Not for syndrome calculating ecc controllers which need a special oob layout
+ */
+static int nand_read_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip,
+ uint8_t *buf)
+{
+ int i, eccsize = chip->ecc.size;
+ int eccbytes = chip->ecc.bytes;
+ int eccsteps = chip->ecc.steps;
+ uint8_t *p = buf;
+ uint8_t *ecc_calc = chip->buffers.ecccalc;
+ uint8_t *ecc_code = chip->buffers.ecccode;
+ int *eccpos = chip->ecc.layout->eccpos;
+
+ for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
+ chip->ecc.hwctl(mtd, NAND_ECC_READ);
+ chip->read_buf(mtd, p, eccsize);
+ chip->ecc.calculate(mtd, p, &ecc_calc[i]);
+ }
+ chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);
- /* Send command to actually program the data */
- chip->cmdfunc(mtd, cached ? NAND_CMD_CACHEDPROG : NAND_CMD_PAGEPROG, -1, -1);
+ for (i = 0; i < chip->ecc.total; i++)
+ ecc_code[i] = chip->oob_poi[eccpos[i]];
- if (!cached) {
- /* call wait ready function */
- status = chip->waitfunc(mtd, chip, FL_WRITING);
+ eccsteps = chip->ecc.steps;
+ p = buf;
- /* See if operation failed and additional status checks are available */
- if ((status & NAND_STATUS_FAIL) && (chip->errstat)) {
- status = chip->errstat(mtd, chip, FL_WRITING, status, page);
- }
+ for (i = 0 ; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
+ int stat;
- /* See if device thinks it succeeded */
- if (status & NAND_STATUS_FAIL) {
- DEBUG(MTD_DEBUG_LEVEL0, "%s: " "Failed write, page 0x%08x, ", __FUNCTION__, page);
- return -EIO;
- }
- } else {
- /* FIXME: Implement cached programming ! */
- /* wait until cache is ready */
- // status = chip->waitfunc (mtd, this, FL_CACHEDRPG);
+ stat = chip->ecc.correct(mtd, p, &ecc_code[i], &ecc_calc[i]);
+ if (stat == -1)
+ mtd->ecc_stats.failed++;
+ else
+ mtd->ecc_stats.corrected += stat;
}
return 0;
}
-#ifdef CONFIG_MTD_NAND_VERIFY_WRITE
/**
- * nand_verify_pages - [GENERIC] verify the chip contents after a write
- * @mtd: MTD device structure
- * @this: NAND chip structure
- * @page: startpage inside the chip, must be called with (page & chip->pagemask)
- * @numpages: number of pages to verify
- * @oob_buf: out of band data buffer
- * @oobsel: out of band selecttion structre
- * @chipnr: number of the current chip
- * @oobmode: 1 = full buffer verify, 0 = ecc only
+ * nand_read_page_syndrome - {REPLACABLE] hardware ecc syndrom based page read
+ * @mtd: mtd info structure
+ * @chip: nand chip info structure
+ * @buf: buffer to store read data
*
- * The NAND device assumes that it is always writing to a cleanly erased page.
- * Hence, it performs its internal write verification only on bits that
- * transitioned from 1 to 0. The device does NOT verify the whole page on a
- * byte by byte basis. It is possible that the page was not completely erased
- * or the page is becoming unusable due to wear. The read with ECC would catch
- * the error later when the ECC page check fails, but we would rather catch
- * it early in the page write stage. Better to write no data than invalid data.
+ * The hw generator calculates the error syndrome automatically. Therefor
+ * we need a special oob layout and handling.
*/
-static int nand_verify_pages(struct mtd_info *mtd, struct nand_chip *chip, int page, int numpages,
- uint8_t *oob_buf, struct nand_oobinfo *oobsel, int chipnr, int oobmode)
+static int nand_read_page_syndrome(struct mtd_info *mtd, struct nand_chip *chip,
+ uint8_t *buf)
{
- int i, j, datidx = 0, oobofs = 0, res = -EIO;
- int eccsteps = chip->eccsteps;
- int hweccbytes;
- uint8_t oobdata[64];
+ int i, eccsize = chip->ecc.size;
+ int eccbytes = chip->ecc.bytes;
+ int eccsteps = chip->ecc.steps;
+ uint8_t *p = buf;
+ uint8_t *oob = chip->oob_poi;
- hweccbytes = (chip->options & NAND_HWECC_SYNDROME) ? (oobsel->eccbytes / eccsteps) : 0;
+ for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
+ int stat;
- /* Send command to read back the first page */
- chip->cmdfunc(mtd, NAND_CMD_READ0, 0, page);
+ chip->ecc.hwctl(mtd, NAND_ECC_READ);
+ chip->read_buf(mtd, p, eccsize);
- for (;;) {
- for (j = 0; j < eccsteps; j++) {
- /* Loop through and verify the data */
- if (chip->verify_buf(mtd, &chip->data_poi[datidx], mtd->eccsize)) {
- DEBUG(MTD_DEBUG_LEVEL0, "%s: " "Failed write verify, page 0x%08x ", __FUNCTION__, page);
- goto out;
- }
- datidx += mtd->eccsize;
- /* Have we a hw generator layout ? */
- if (!hweccbytes)
- continue;
- if (chip->verify_buf(mtd, &chip->oob_buf[oobofs], hweccbytes)) {
- DEBUG(MTD_DEBUG_LEVEL0, "%s: " "Failed write verify, page 0x%08x ", __FUNCTION__, page);
- goto out;
- }
- oobofs += hweccbytes;
+ if (chip->ecc.prepad) {
+ chip->read_buf(mtd, oob, chip->ecc.prepad);
+ oob += chip->ecc.prepad;
}
- /* check, if we must compare all data or if we just have to
- * compare the ecc bytes
- */
- if (oobmode) {
- if (chip->verify_buf(mtd, &oob_buf[oobofs], mtd->oobsize - hweccbytes * eccsteps)) {
- DEBUG(MTD_DEBUG_LEVEL0, "%s: " "Failed write verify, page 0x%08x ", __FUNCTION__, page);
- goto out;
- }
- } else {
- /* Read always, else autoincrement fails */
- chip->read_buf(mtd, oobdata, mtd->oobsize - hweccbytes * eccsteps);
-
- if (oobsel->useecc != MTD_NANDECC_OFF && !hweccbytes) {
- int ecccnt = oobsel->eccbytes;
-
- for (i = 0; i < ecccnt; i++) {
- int idx = oobsel->eccpos[i];
- if (oobdata[idx] != oob_buf[oobofs + idx]) {
- DEBUG(MTD_DEBUG_LEVEL0, "%s: Failed ECC write verify, page 0x%08x, %6i bytes were succesful\n",
- __FUNCTION__, page, i);
- goto out;
- }
- }
- }
- }
- oobofs += mtd->oobsize - hweccbytes * eccsteps;
- page++;
- numpages--;
-
- /* Apply delay or wait for ready/busy pin
- * Do this before the AUTOINCR check, so no problems
- * arise if a chip which does auto increment
- * is marked as NOAUTOINCR by the board driver.
- * Do this also before returning, so the chip is
- * ready for the next command.
- */
- if (!chip->dev_ready)
- udelay(chip->chip_delay);
+ chip->ecc.hwctl(mtd, NAND_ECC_READSYN);
+ chip->read_buf(mtd, oob, eccbytes);
+ stat = chip->ecc.correct(mtd, p, oob, NULL);
+
+ if (stat == -1)
+ mtd->ecc_stats.failed++;
else
- nand_wait_ready(mtd);
+ mtd->ecc_stats.corrected += stat;
- /* All done, return happy */
- if (!numpages)
- return 0;
+ oob += eccbytes;
- /* Check, if the chip supports auto page increment */
- if (!NAND_CANAUTOINCR(this))
- chip->cmdfunc(mtd, NAND_CMD_READ0, 0x00, page);
+ if (chip->ecc.postpad) {
+ chip->read_buf(mtd, oob, chip->ecc.postpad);
+ oob += chip->ecc.postpad;
+ }
}
- /*
- * Terminate the read command. We come here in case of an error
- * So we must issue a reset command.
- */
- out:
- chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1);
- return res;
+
+ /* Calculate remaining oob bytes */
+ i = mtd->oobsize - (oob - chip->oob_poi);
+ if (i)
+ chip->read_buf(mtd, oob, i);
+
+ return 0;
}
-#endif
/**
- * nand_read - [MTD Interface] MTD compability function for nand_do_read_ecc
- * @mtd: MTD device structure
- * @from: offset to read from
- * @len: number of bytes to read
- * @retlen: pointer to variable to store the number of read bytes
- * @buf: the databuffer to put data
- *
- * This function simply calls nand_do_read_ecc with oob buffer and oobsel = NULL
- * and flags = 0xff
+ * nand_transfer_oob - [Internal] Transfer oob to client buffer
+ * @chip: nand chip structure
+ * @oob: oob destination address
+ * @ops: oob ops structure
*/
-static int nand_read(struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, uint8_t *buf)
+static uint8_t *nand_transfer_oob(struct nand_chip *chip, uint8_t *oob,
+ struct mtd_oob_ops *ops)
{
- return nand_do_read_ecc(mtd, from, len, retlen, buf, NULL, &mtd->oobinfo, 0xff);
+ size_t len = ops->ooblen;
+
+ switch(ops->mode) {
+
+ case MTD_OOB_PLACE:
+ case MTD_OOB_RAW:
+ memcpy(oob, chip->oob_poi + ops->ooboffs, len);
+ return oob + len;
+
+ case MTD_OOB_AUTO: {
+ struct nand_oobfree *free = chip->ecc.layout->oobfree;
+ uint32_t boffs = 0, roffs = ops->ooboffs;
+ size_t bytes = 0;
+
+ for(; free->length && len; free++, len -= bytes) {
+ /* Read request not from offset 0 ? */
+ if (unlikely(roffs)) {
+ if (roffs >= free->length) {
+ roffs -= free->length;
+ continue;
+ }
+ boffs = free->offset + roffs;
+ bytes = min_t(size_t, len,
+ (free->length - roffs));
+ roffs = 0;
+ } else {
+ bytes = min_t(size_t, len, free->length);
+ boffs = free->offset;
+ }
+ memcpy(oob, chip->oob_poi + boffs, bytes);
+ oob += bytes;
+ }
+ return oob;
+ }
+ default:
+ BUG();
+ }
+ return NULL;
}
/**
- * nand_do_read_ecc - [MTD Interface] Read data with ECC
+ * nand_do_read_ops - [Internal] Read data with ECC
+ *
* @mtd: MTD device structure
* @from: offset to read from
- * @len: number of bytes to read
- * @retlen: pointer to variable to store the number of read bytes
- * @buf: the databuffer to put data
- * @oob_buf: filesystem supplied oob data buffer (can be NULL)
- * @oobsel: oob selection structure
- * @flags: flag to indicate if nand_get_device/nand_release_device should be preformed
- * and how many corrected error bits are acceptable:
- * bits 0..7 - number of tolerable errors
- * bit 8 - 0 == do not get/release chip, 1 == get/release chip
+ * @ops: oob ops structure
*
- * NAND read with ECC
+ * Internal function. Called with chip held.
*/
-int nand_do_read_ecc(struct mtd_info *mtd, loff_t from, size_t len,
- size_t *retlen, uint8_t *buf, uint8_t *oob_buf, struct nand_oobinfo *oobsel, int flags)
+static int nand_do_read_ops(struct mtd_info *mtd, loff_t from,
+ struct mtd_oob_ops *ops)
{
-
- int i, j, col, realpage, page, end, ecc, chipnr, sndcmd = 1;
- int read = 0, oob = 0, ecc_status = 0, ecc_failed = 0;
+ int chipnr, page, realpage, col, bytes, aligned;
struct nand_chip *chip = mtd->priv;
- uint8_t *data_poi, *oob_data = oob_buf;
- uint8_t ecc_calc[32];
- uint8_t ecc_code[32];
- int eccmode, eccsteps;
- int *oob_config, datidx;
- int blockcheck = (1 << (chip->phys_erase_shift - chip->page_shift)) - 1;
- int eccbytes;
- int compareecc = 1;
- int oobreadlen;
-
- DEBUG(MTD_DEBUG_LEVEL3, "nand_read_ecc: from = 0x%08x, len = %i\n", (unsigned int)from, (int)len);
-
- /* Do not allow reads past end of device */
- if ((from + len) > mtd->size) {
- DEBUG(MTD_DEBUG_LEVEL0, "nand_read_ecc: Attempt read beyond end of device\n");
- *retlen = 0;
- return -EINVAL;
- }
-
- /* Grab the lock and see if the device is available */
- if (flags & NAND_GET_DEVICE)
- nand_get_device(chip, mtd, FL_READING);
-
- /* Autoplace of oob data ? Use the default placement scheme */
- if (oobsel->useecc == MTD_NANDECC_AUTOPLACE)
- oobsel = chip->autooob;
+ struct mtd_ecc_stats stats;
+ int blkcheck = (1 << (chip->phys_erase_shift - chip->page_shift)) - 1;
+ int sndcmd = 1;
+ int ret = 0;
+ uint32_t readlen = ops->len;
+ uint8_t *bufpoi, *oob, *buf;
- eccmode = oobsel->useecc ? chip->ecc.mode : NAND_ECC_NONE;
- oob_config = oobsel->eccpos;
+ stats = mtd->ecc_stats;
- /* Select the NAND device */
chipnr = (int)(from >> chip->chip_shift);
chip->select_chip(mtd, chipnr);
- /* First we calculate the starting page */
realpage = (int)(from >> chip->page_shift);
page = realpage & chip->pagemask;
- /* Get raw starting column */
- col = from & (mtd->writesize - 1);
-
- end = mtd->writesize;
- ecc = chip->ecc.size;
- eccbytes = chip->ecc.bytes;
-
- if ((eccmode == NAND_ECC_NONE) || (chip->options & NAND_HWECC_SYNDROME))
- compareecc = 0;
-
- oobreadlen = mtd->oobsize;
- if (chip->options & NAND_HWECC_SYNDROME)
- oobreadlen -= oobsel->eccbytes;
-
- /* Loop until all data read */
- while (read < len) {
+ col = (int)(from & (mtd->writesize - 1));
+ chip->oob_poi = chip->buffers.oobrbuf;
- int aligned = (!col && (len - read) >= end);
- /*
- * If the read is not page aligned, we have to read into data buffer
- * due to ecc, else we read into return buffer direct
- */
- if (aligned)
- data_poi = &buf[read];
- else
- data_poi = chip->data_buf;
+ buf = ops->datbuf;
+ oob = ops->oobbuf;
- /* Check, if we have this page in the buffer
- *
- * FIXME: Make it work when we must provide oob data too,
- * check the usage of data_buf oob field
- */
- if (realpage == chip->pagebuf && !oob_buf) {
- /* aligned read ? */
- if (aligned)
- memcpy(data_poi, chip->data_buf, end);
- goto readdata;
- }
+ while(1) {
+ bytes = min(mtd->writesize - col, readlen);
+ aligned = (bytes == mtd->writesize);
- /* Check, if we must send the read command */
- if (sndcmd) {
- chip->cmdfunc(mtd, NAND_CMD_READ0, 0x00, page);
- sndcmd = 0;
- }
+ /* Is the current page in the buffer ? */
+ if (realpage != chip->pagebuf || oob) {
+ bufpoi = aligned ? buf : chip->buffers.databuf;
- /* get oob area, if we have no oob buffer from fs-driver */
- if (!oob_buf || oobsel->useecc == MTD_NANDECC_AUTOPLACE ||
- oobsel->useecc == MTD_NANDECC_AUTOPL_USR)
- oob_data = &chip->data_buf[end];
-
- eccsteps = chip->ecc.steps;
-
- switch (eccmode) {
- case NAND_ECC_NONE:{
- /* No ECC, Read in a page */
- static unsigned long lastwhinge = 0;
- if ((lastwhinge / HZ) != (jiffies / HZ)) {
- printk(KERN_WARNING
- "Reading data from NAND FLASH without ECC is not recommended\n");
- lastwhinge = jiffies;
- }
- chip->read_buf(mtd, data_poi, end);
- break;
+ if (likely(sndcmd)) {
+ chip->cmdfunc(mtd, NAND_CMD_READ0, 0x00, page);
+ sndcmd = 0;
}
- case NAND_ECC_SOFT: /* Software ECC 3/256: Read in a page + oob data */
- chip->read_buf(mtd, data_poi, end);
- for (i = 0, datidx = 0; eccsteps; eccsteps--, i += 3, datidx += ecc)
- chip->ecc.calculate(mtd, &data_poi[datidx], &ecc_calc[i]);
- break;
+ /* Now read the page into the buffer */
+ ret = chip->ecc.read_page(mtd, chip, bufpoi);
+ if (ret < 0)
+ break;
- default:
- for (i = 0, datidx = 0; eccsteps; eccsteps--, i += eccbytes, datidx += ecc) {
- chip->ecc.hwctl(mtd, NAND_ECC_READ);
- chip->read_buf(mtd, &data_poi[datidx], ecc);
-
- /* HW ecc with syndrome calculation must read the
- * syndrome from flash immidiately after the data */
- if (!compareecc) {
- /* Some hw ecc generators need to know when the
- * syndrome is read from flash */
- chip->ecc.hwctl(mtd, NAND_ECC_READSYN);
- chip->read_buf(mtd, &oob_data[i], eccbytes);
- /* We calc error correction directly, it checks the hw
- * generator for an error, reads back the syndrome and
- * does the error correction on the fly */
- ecc_status = chip->ecc.correct(mtd, &data_poi[datidx], &oob_data[i], &ecc_code[i]);
- if ((ecc_status == -1) || (ecc_status > (flags && 0xff))) {
- DEBUG(MTD_DEBUG_LEVEL0, "nand_read_ecc: "
- "Failed ECC read, page 0x%08x on chip %d\n", page, chipnr);
- ecc_failed++;
- }
- } else {
- chip->ecc.calculate(mtd, &data_poi[datidx], &ecc_calc[i]);
- }
+ /* Transfer not aligned data */
+ if (!aligned) {
+ chip->pagebuf = realpage;
+ memcpy(buf, chip->buffers.databuf + col, bytes);
}
- break;
- }
-
- /* read oobdata */
- chip->read_buf(mtd, &oob_data[mtd->oobsize - oobreadlen], oobreadlen);
- /* Skip ECC check, if not requested (ECC_NONE or HW_ECC with syndromes) */
- if (!compareecc)
- goto readoob;
+ buf += bytes;
- /* Pick the ECC bytes out of the oob data */
- for (j = 0; j < oobsel->eccbytes; j++)
- ecc_code[j] = oob_data[oob_config[j]];
-
- /* correct data, if necessary */
- for (i = 0, j = 0, datidx = 0; i < chip->ecc.steps; i++, datidx += ecc) {
- ecc_status = chip->ecc.correct(mtd, &data_poi[datidx], &ecc_code[j], &ecc_calc[j]);
-
- /* Get next chunk of ecc bytes */
- j += eccbytes;
-
- /* Check, if we have a fs supplied oob-buffer,
- * This is the legacy mode. Used by YAFFS1
- * Should go away some day
- */
- if (oob_buf && oobsel->useecc == MTD_NANDECC_PLACE) {
- int *p = (int *)(&oob_data[mtd->oobsize]);
- p[i] = ecc_status;
+ if (unlikely(oob)) {
+ /* Raw mode does data:oob:data:oob */
+ if (ops->mode != MTD_OOB_RAW)
+ oob = nand_transfer_oob(chip, oob, ops);
+ else
+ buf = nand_transfer_oob(chip, buf, ops);
}
- if ((ecc_status == -1) || (ecc_status > (flags && 0xff))) {
- DEBUG(MTD_DEBUG_LEVEL0, "nand_read_ecc: " "Failed ECC read, page 0x%08x\n", page);
- ecc_failed++;
- }
- }
-
- readoob:
- /* check, if we have a fs supplied oob-buffer */
- if (oob_buf) {
- /* without autoplace. Legacy mode used by YAFFS1 */
- switch (oobsel->useecc) {
- case MTD_NANDECC_AUTOPLACE:
- case MTD_NANDECC_AUTOPL_USR:
- /* Walk through the autoplace chunks */
- for (i = 0; oobsel->oobfree[i][1]; i++) {
- int from = oobsel->oobfree[i][0];
- int num = oobsel->oobfree[i][1];
- memcpy(&oob_buf[oob], &oob_data[from], num);
- oob += num;
- }
- break;
- case MTD_NANDECC_PLACE:
- /* YAFFS1 legacy mode */
- oob_data += chip->ecc.steps * sizeof(int);
- default:
- oob_data += mtd->oobsize;
+ if (!(chip->options & NAND_NO_READRDY)) {
+ /*
+ * Apply delay or wait for ready/busy pin. Do
+ * this before the AUTOINCR check, so no
+ * problems arise if a chip which does auto
+ * increment is marked as NOAUTOINCR by the
+ * board driver.
+ */
+ if (!chip->dev_ready)
+ udelay(chip->chip_delay);
+ else
+ nand_wait_ready(mtd);
}
+ } else {
+ memcpy(buf, chip->buffers.databuf + col, bytes);
+ buf += bytes;
}
- readdata:
- /* Partial page read, transfer data into fs buffer */
- if (!aligned) {
- for (j = col; j < end && read < len; j++)
- buf[read++] = data_poi[j];
- chip->pagebuf = realpage;
- } else
- read += mtd->writesize;
- /* Apply delay or wait for ready/busy pin
- * Do this before the AUTOINCR check, so no problems
- * arise if a chip which does auto increment
- * is marked as NOAUTOINCR by the board driver.
- */
- if (!chip->dev_ready)
- udelay(chip->chip_delay);
- else
- nand_wait_ready(mtd);
+ readlen -= bytes;
- if (read == len)
+ if (!readlen)
break;
/* For subsequent reads align to page boundary. */
chip->select_chip(mtd, -1);
chip->select_chip(mtd, chipnr);
}
+
/* Check, if the chip supports auto page increment
* or if we have hit a block boundary.
*/
- if (!NAND_CANAUTOINCR(chip) || !(page & blockcheck))
+ if (!NAND_CANAUTOINCR(chip) || !(page & blkcheck))
sndcmd = 1;
}
- /* Deselect and wake up anyone waiting on the device */
- if (flags & NAND_GET_DEVICE)
- nand_release_device(mtd);
+ ops->retlen = ops->len - (size_t) readlen;
- /*
- * Return success, if no ECC failures, else -EBADMSG
- * fs driver will take care of that, because
- * retlen == desired len and result == -EBADMSG
- */
- *retlen = read;
- return ecc_failed ? -EBADMSG : 0;
+ if (ret)
+ return ret;
+
+ if (mtd->ecc_stats.failed - stats.failed)
+ return -EBADMSG;
+
+ return mtd->ecc_stats.corrected - stats.corrected ? -EUCLEAN : 0;
}
/**
- * nand_read_oob - [MTD Interface] NAND read out-of-band
+ * nand_read - [MTD Interface] MTD compability function for nand_do_read_ecc
* @mtd: MTD device structure
* @from: offset to read from
* @len: number of bytes to read
* @retlen: pointer to variable to store the number of read bytes
* @buf: the databuffer to put data
*
- * NAND read out-of-band data from the spare area
+ * Get hold of the chip and call nand_do_read
*/
-static int nand_read_oob(struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, uint8_t *buf)
+static int nand_read(struct mtd_info *mtd, loff_t from, size_t len,
+ size_t *retlen, uint8_t *buf)
{
- int i, col, page, chipnr;
struct nand_chip *chip = mtd->priv;
- int blockcheck = (1 << (chip->phys_erase_shift - chip->page_shift)) - 1;
-
- DEBUG(MTD_DEBUG_LEVEL3, "nand_read_oob: from = 0x%08x, len = %i\n", (unsigned int)from, (int)len);
-
- /* Shift to get page */
- page = (int)(from >> chip->page_shift);
- chipnr = (int)(from >> chip->chip_shift);
-
- /* Mask to get column */
- col = from & (mtd->oobsize - 1);
-
- /* Initialize return length value */
- *retlen = 0;
+ int ret;
/* Do not allow reads past end of device */
- if ((from + len) > mtd->size) {
- DEBUG(MTD_DEBUG_LEVEL0, "nand_read_oob: Attempt read beyond end of device\n");
- *retlen = 0;
+ if ((from + len) > mtd->size)
return -EINVAL;
- }
+ if (!len)
+ return 0;
- /* Grab the lock and see if the device is available */
nand_get_device(chip, mtd, FL_READING);
- /* Select the NAND device */
- chip->select_chip(mtd, chipnr);
-
- /* Send the read command */
- chip->cmdfunc(mtd, NAND_CMD_READOOB, col, page & chip->pagemask);
- /*
- * Read the data, if we read more than one page
- * oob data, let the device transfer the data !
- */
- i = 0;
- while (i < len) {
- int thislen = mtd->oobsize - col;
- thislen = min_t(int, thislen, len);
- chip->read_buf(mtd, &buf[i], thislen);
- i += thislen;
-
- /* Read more ? */
- if (i < len) {
- page++;
- col = 0;
-
- /* Check, if we cross a chip boundary */
- if (!(page & chip->pagemask)) {
- chipnr++;
- chip->select_chip(mtd, -1);
- chip->select_chip(mtd, chipnr);
- }
+ chip->ops.len = len;
+ chip->ops.datbuf = buf;
+ chip->ops.oobbuf = NULL;
- /* Apply delay or wait for ready/busy pin
- * Do this before the AUTOINCR check, so no problems
- * arise if a chip which does auto increment
- * is marked as NOAUTOINCR by the board driver.
- */
- if (!chip->dev_ready)
- udelay(chip->chip_delay);
- else
- nand_wait_ready(mtd);
+ ret = nand_do_read_ops(mtd, from, &chip->ops);
- /* Check, if the chip supports auto page increment
- * or if we have hit a block boundary.
- */
- if (!NAND_CANAUTOINCR(chip) || !(page & blockcheck)) {
- /* For subsequent page reads set offset to 0 */
- chip->cmdfunc(mtd, NAND_CMD_READOOB, 0x0, page & chip->pagemask);
- }
- }
- }
+ *retlen = chip->ops.retlen;
- /* Deselect and wake up anyone waiting on the device */
nand_release_device(mtd);
- /* Return happy */
- *retlen = len;
- return 0;
+ return ret;
}
/**
- * nand_read_raw - [GENERIC] Read raw data including oob into buffer
- * @mtd: MTD device structure
- * @buf: temporary buffer
- * @from: offset to read from
- * @len: number of bytes to read
- * @ooblen: number of oob data bytes to read
- *
- * Read raw data including oob into buffer
+ * nand_read_oob_std - [REPLACABLE] the most common OOB data read function
+ * @mtd: mtd info structure
+ * @chip: nand chip info structure
+ * @page: page number to read
+ * @sndcmd: flag whether to issue read command or not
*/
-int nand_read_raw(struct mtd_info *mtd, uint8_t *buf, loff_t from, size_t len,
- size_t ooblen)
+static int nand_read_oob_std(struct mtd_info *mtd, struct nand_chip *chip,
+ int page, int sndcmd)
{
- struct nand_chip *chip = mtd->priv;
- int page = (int)(from >> chip->page_shift);
- int chipnr = (int)(from >> chip->chip_shift);
- int sndcmd = 1;
- int cnt = 0;
- int pagesize = mtd->writesize + mtd->oobsize;
- int blockcheck;
+ if (sndcmd) {
+ chip->cmdfunc(mtd, NAND_CMD_READOOB, 0, page);
+ sndcmd = 0;
+ }
+ chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);
+ return sndcmd;
+}
- /* Do not allow reads past end of device */
- if ((from + len) > mtd->size) {
- DEBUG(MTD_DEBUG_LEVEL0, "nand_read_raw: "
- "Attempt read beyond end of device\n");
- return -EINVAL;
+/**
+ * nand_read_oob_syndrome - [REPLACABLE] OOB data read function for HW ECC
+ * with syndromes
+ * @mtd: mtd info structure
+ * @chip: nand chip info structure
+ * @page: page number to read
+ * @sndcmd: flag whether to issue read command or not
+ */
+static int nand_read_oob_syndrome(struct mtd_info *mtd, struct nand_chip *chip,
+ int page, int sndcmd)
+{
+ uint8_t *buf = chip->oob_poi;
+ int length = mtd->oobsize;
+ int chunk = chip->ecc.bytes + chip->ecc.prepad + chip->ecc.postpad;
+ int eccsize = chip->ecc.size;
+ uint8_t *bufpoi = buf;
+ int i, toread, sndrnd = 0, pos;
+
+ chip->cmdfunc(mtd, NAND_CMD_READ0, chip->ecc.size, page);
+ for (i = 0; i < chip->ecc.steps; i++) {
+ if (sndrnd) {
+ pos = eccsize + i * (eccsize + chunk);
+ if (mtd->writesize > 512)
+ chip->cmdfunc(mtd, NAND_CMD_RNDOUT, pos, -1);
+ else
+ chip->cmdfunc(mtd, NAND_CMD_READ0, pos, page);
+ } else
+ sndrnd = 1;
+ toread = min_t(int, length, chunk);
+ chip->read_buf(mtd, bufpoi, toread);
+ bufpoi += toread;
+ length -= toread;
}
+ if (length > 0)
+ chip->read_buf(mtd, bufpoi, length);
- /* Grab the lock and see if the device is available */
- nand_get_device(chip, mtd, FL_READING);
+ return 1;
+}
- chip->select_chip(mtd, chipnr);
+/**
+ * nand_write_oob_std - [REPLACABLE] the most common OOB data write function
+ * @mtd: mtd info structure
+ * @chip: nand chip info structure
+ * @page: page number to write
+ */
+static int nand_write_oob_std(struct mtd_info *mtd, struct nand_chip *chip,
+ int page)
+{
+ int status = 0;
+ const uint8_t *buf = chip->oob_poi;
+ int length = mtd->oobsize;
- /* Add requested oob length */
- len += ooblen;
- blockcheck = (1 << (chip->phys_erase_shift - chip->page_shift)) - 1;
+ chip->cmdfunc(mtd, NAND_CMD_SEQIN, mtd->writesize, page);
+ chip->write_buf(mtd, buf, length);
+ /* Send command to program the OOB data */
+ chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1);
- while (len) {
- if (sndcmd)
- chip->cmdfunc(mtd, NAND_CMD_READ0, 0,
- page & chip->pagemask);
- sndcmd = 0;
+ status = chip->waitfunc(mtd, chip);
- chip->read_buf(mtd, &buf[cnt], pagesize);
+ return status & NAND_STATUS_FAIL ? -EIO : 0;
+}
- len -= pagesize;
- cnt += pagesize;
- page++;
+/**
+ * nand_write_oob_syndrome - [REPLACABLE] OOB data write function for HW ECC
+ * with syndrome - only for large page flash !
+ * @mtd: mtd info structure
+ * @chip: nand chip info structure
+ * @page: page number to write
+ */
+static int nand_write_oob_syndrome(struct mtd_info *mtd,
+ struct nand_chip *chip, int page)
+{
+ int chunk = chip->ecc.bytes + chip->ecc.prepad + chip->ecc.postpad;
+ int eccsize = chip->ecc.size, length = mtd->oobsize;
+ int i, len, pos, status = 0, sndcmd = 0, steps = chip->ecc.steps;
+ const uint8_t *bufpoi = chip->oob_poi;
- if (!chip->dev_ready)
- udelay(chip->chip_delay);
- else
- nand_wait_ready(mtd);
+ /*
+ * data-ecc-data-ecc ... ecc-oob
+ * or
+ * data-pad-ecc-pad-data-pad .... ecc-pad-oob
+ */
+ if (!chip->ecc.prepad && !chip->ecc.postpad) {
+ pos = steps * (eccsize + chunk);
+ steps = 0;
+ } else
+ pos = eccsize;
- /*
- * Check, if the chip supports auto page increment or if we
- * cross a block boundary.
- */
- if (!NAND_CANAUTOINCR(chip) || !(page & blockcheck))
+ chip->cmdfunc(mtd, NAND_CMD_SEQIN, pos, page);
+ for (i = 0; i < steps; i++) {
+ if (sndcmd) {
+ if (mtd->writesize <= 512) {
+ uint32_t fill = 0xFFFFFFFF;
+
+ len = eccsize;
+ while (len > 0) {
+ int num = min_t(int, len, 4);
+ chip->write_buf(mtd, (uint8_t *)&fill,
+ num);
+ len -= num;
+ }
+ } else {
+ pos = eccsize + i * (eccsize + chunk);
+ chip->cmdfunc(mtd, NAND_CMD_RNDIN, pos, -1);
+ }
+ } else
sndcmd = 1;
+ len = min_t(int, length, chunk);
+ chip->write_buf(mtd, bufpoi, len);
+ bufpoi += len;
+ length -= len;
}
+ if (length > 0)
+ chip->write_buf(mtd, bufpoi, length);
- /* Deselect and wake up anyone waiting on the device */
- nand_release_device(mtd);
- return 0;
+ chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1);
+ status = chip->waitfunc(mtd, chip);
+
+ return status & NAND_STATUS_FAIL ? -EIO : 0;
}
/**
- * nand_write_raw - [GENERIC] Write raw data including oob
+ * nand_do_read_oob - [Intern] NAND read out-of-band
* @mtd: MTD device structure
- * @buf: source buffer
- * @to: offset to write to
- * @len: number of bytes to write
- * @buf: source buffer
- * @oob: oob buffer
+ * @from: offset to read from
+ * @ops: oob operations description structure
*
- * Write raw data including oob
+ * NAND read out-of-band data from the spare area
*/
-int nand_write_raw(struct mtd_info *mtd, loff_t to, size_t len, size_t *retlen,
- uint8_t *buf, uint8_t *oob)
+static int nand_do_read_oob(struct mtd_info *mtd, loff_t from,
+ struct mtd_oob_ops *ops)
{
+ int page, realpage, chipnr, sndcmd = 1;
struct nand_chip *chip = mtd->priv;
- int page = (int)(to >> chip->page_shift);
- int chipnr = (int)(to >> chip->chip_shift);
- int ret;
+ int blkcheck = (1 << (chip->phys_erase_shift - chip->page_shift)) - 1;
+ int readlen = ops->len;
+ uint8_t *buf = ops->oobbuf;
- *retlen = 0;
+ DEBUG(MTD_DEBUG_LEVEL3, "nand_read_oob: from = 0x%08Lx, len = %i\n",
+ (unsigned long long)from, readlen);
- /* Do not allow writes past end of device */
- if ((to + len) > mtd->size) {
- DEBUG(MTD_DEBUG_LEVEL0, "nand_read_raw: Attempt write "
- "beyond end of device\n");
- return -EINVAL;
- }
+ chipnr = (int)(from >> chip->chip_shift);
+ chip->select_chip(mtd, chipnr);
- /* Grab the lock and see if the device is available */
- nand_get_device(chip, mtd, FL_WRITING);
+ /* Shift to get page */
+ realpage = (int)(from >> chip->page_shift);
+ page = realpage & chip->pagemask;
- chip->select_chip(mtd, chipnr);
- chip->data_poi = buf;
+ chip->oob_poi = chip->buffers.oobrbuf;
- while (len != *retlen) {
- ret = nand_write_page(mtd, chip, page, oob, &mtd->oobinfo, 0);
- if (ret)
- return ret;
- page++;
- *retlen += mtd->writesize;
- chip->data_poi += mtd->writesize;
- oob += mtd->oobsize;
+ while(1) {
+ sndcmd = chip->ecc.read_oob(mtd, chip, page, sndcmd);
+ buf = nand_transfer_oob(chip, buf, ops);
+
+ if (!(chip->options & NAND_NO_READRDY)) {
+ /*
+ * Apply delay or wait for ready/busy pin. Do this
+ * before the AUTOINCR check, so no problems arise if a
+ * chip which does auto increment is marked as
+ * NOAUTOINCR by the board driver.
+ */
+ if (!chip->dev_ready)
+ udelay(chip->chip_delay);
+ else
+ nand_wait_ready(mtd);
+ }
+
+ readlen -= ops->ooblen;
+ if (!readlen)
+ break;
+
+ /* Increment page address */
+ realpage++;
+
+ page = realpage & chip->pagemask;
+ /* Check, if we cross a chip boundary */
+ if (!page) {
+ chipnr++;
+ chip->select_chip(mtd, -1);
+ chip->select_chip(mtd, chipnr);
+ }
+
+ /* Check, if the chip supports auto page increment
+ * or if we have hit a block boundary.
+ */
+ if (!NAND_CANAUTOINCR(chip) || !(page & blkcheck))
+ sndcmd = 1;
}
- /* Deselect and wake up anyone waiting on the device */
- nand_release_device(mtd);
+ ops->retlen = ops->len;
return 0;
}
-EXPORT_SYMBOL_GPL(nand_write_raw);
/**
- * nand_prepare_oobbuf - [GENERIC] Prepare the out of band buffer
+ * nand_read_oob - [MTD Interface] NAND read data and/or out-of-band
* @mtd: MTD device structure
- * @fsbuf: buffer given by fs driver
- * @oobsel: out of band selection structre
- * @autoplace: 1 = place given buffer into the oob bytes
- * @numpages: number of pages to prepare
- *
- * Return:
- * 1. Filesystem buffer available and autoplacement is off,
- * return filesystem buffer
- * 2. No filesystem buffer or autoplace is off, return internal
- * buffer
- * 3. Filesystem buffer is given and autoplace selected
- * put data from fs buffer into internal buffer and
- * retrun internal buffer
- *
- * Note: The internal buffer is filled with 0xff. This must
- * be done only once, when no autoplacement happens
- * Autoplacement sets the buffer dirty flag, which
- * forces the 0xff fill before using the buffer again.
+ * @from: offset to read from
+ * @ops: oob operation description structure
*
-*/
-static uint8_t *nand_prepare_oobbuf(struct mtd_info *mtd, uint8_t *fsbuf, struct nand_oobinfo *oobsel,
- int autoplace, int numpages)
+ * NAND read data and/or out-of-band data
+ */
+static int nand_read_oob(struct mtd_info *mtd, loff_t from,
+ struct mtd_oob_ops *ops)
{
+ int (*read_page)(struct mtd_info *mtd, struct nand_chip *chip,
+ uint8_t *buf) = NULL;
struct nand_chip *chip = mtd->priv;
- int i, len, ofs;
+ int ret = -ENOTSUPP;
+
+ ops->retlen = 0;
+
+ /* Do not allow reads past end of device */
+ if ((from + ops->len) > mtd->size) {
+ DEBUG(MTD_DEBUG_LEVEL0, "nand_read_oob: "
+ "Attempt read beyond end of device\n");
+ return -EINVAL;
+ }
+
+ nand_get_device(chip, mtd, FL_READING);
+
+ switch(ops->mode) {
+ case MTD_OOB_PLACE:
+ case MTD_OOB_AUTO:
+ break;
+
+ case MTD_OOB_RAW:
+ /* Replace the read_page algorithm temporary */
+ read_page = chip->ecc.read_page;
+ chip->ecc.read_page = nand_read_page_raw;
+ break;
+
+ default:
+ goto out;
+ }
+
+ if (!ops->datbuf)
+ ret = nand_do_read_oob(mtd, from, ops);
+ else
+ ret = nand_do_read_ops(mtd, from, ops);
+
+ if (unlikely(ops->mode == MTD_OOB_RAW))
+ chip->ecc.read_page = read_page;
+ out:
+ nand_release_device(mtd);
+ return ret;
+}
+
+
+/**
+ * nand_write_page_raw - [Intern] raw page write function
+ * @mtd: mtd info structure
+ * @chip: nand chip info structure
+ * @buf: data buffer
+ */
+static void nand_write_page_raw(struct mtd_info *mtd, struct nand_chip *chip,
+ const uint8_t *buf)
+{
+ chip->write_buf(mtd, buf, mtd->writesize);
+ chip->write_buf(mtd, chip->oob_poi, mtd->oobsize);
+}
+
+/**
+ * nand_write_page_swecc - {REPLACABLE] software ecc based page write function
+ * @mtd: mtd info structure
+ * @chip: nand chip info structure
+ * @buf: data buffer
+ */
+static void nand_write_page_swecc(struct mtd_info *mtd, struct nand_chip *chip,
+ const uint8_t *buf)
+{
+ int i, eccsize = chip->ecc.size;
+ int eccbytes = chip->ecc.bytes;
+ int eccsteps = chip->ecc.steps;
+ uint8_t *ecc_calc = chip->buffers.ecccalc;
+ const uint8_t *p = buf;
+ int *eccpos = chip->ecc.layout->eccpos;
+
+ /* Software ecc calculation */
+ for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize)
+ chip->ecc.calculate(mtd, p, &ecc_calc[i]);
- /* Zero copy fs supplied buffer */
- if (fsbuf && !autoplace)
- return fsbuf;
+ for (i = 0; i < chip->ecc.total; i++)
+ chip->oob_poi[eccpos[i]] = ecc_calc[i];
- /* Check, if the buffer must be filled with ff again */
- if (chip->oobdirty) {
- memset(chip->oob_buf, 0xff, mtd->oobsize << (chip->phys_erase_shift - chip->page_shift));
- chip->oobdirty = 0;
+ nand_write_page_raw(mtd, chip, buf);
+}
+
+/**
+ * nand_write_page_hwecc - {REPLACABLE] hardware ecc based page write function
+ * @mtd: mtd info structure
+ * @chip: nand chip info structure
+ * @buf: data buffer
+ */
+static void nand_write_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip,
+ const uint8_t *buf)
+{
+ int i, eccsize = chip->ecc.size;
+ int eccbytes = chip->ecc.bytes;
+ int eccsteps = chip->ecc.steps;
+ uint8_t *ecc_calc = chip->buffers.ecccalc;
+ const uint8_t *p = buf;
+ int *eccpos = chip->ecc.layout->eccpos;
+
+ for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
+ chip->ecc.hwctl(mtd, NAND_ECC_WRITE);
+ chip->write_buf(mtd, p, eccsize);
+ chip->ecc.calculate(mtd, p, &ecc_calc[i]);
}
- /* If we have no autoplacement or no fs buffer use the internal one */
- if (!autoplace || !fsbuf)
- return chip->oob_buf;
-
- /* Walk through the pages and place the data */
- chip->oobdirty = 1;
- ofs = 0;
- while (numpages--) {
- for (i = 0, len = 0; len < mtd->oobavail; i++) {
- int to = ofs + oobsel->oobfree[i][0];
- int num = oobsel->oobfree[i][1];
- memcpy(&chip->oob_buf[to], fsbuf, num);
- len += num;
- fsbuf += num;
+ for (i = 0; i < chip->ecc.total; i++)
+ chip->oob_poi[eccpos[i]] = ecc_calc[i];
+
+ chip->write_buf(mtd, chip->oob_poi, mtd->oobsize);
+}
+
+/**
+ * nand_write_page_syndrome - {REPLACABLE] hardware ecc syndrom based page write
+ * @mtd: mtd info structure
+ * @chip: nand chip info structure
+ * @buf: data buffer
+ *
+ * The hw generator calculates the error syndrome automatically. Therefor
+ * we need a special oob layout and handling.
+ */
+static void nand_write_page_syndrome(struct mtd_info *mtd,
+ struct nand_chip *chip, const uint8_t *buf)
+{
+ int i, eccsize = chip->ecc.size;
+ int eccbytes = chip->ecc.bytes;
+ int eccsteps = chip->ecc.steps;
+ const uint8_t *p = buf;
+ uint8_t *oob = chip->oob_poi;
+
+ for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
+
+ chip->ecc.hwctl(mtd, NAND_ECC_WRITE);
+ chip->write_buf(mtd, p, eccsize);
+
+ if (chip->ecc.prepad) {
+ chip->write_buf(mtd, oob, chip->ecc.prepad);
+ oob += chip->ecc.prepad;
+ }
+
+ chip->ecc.calculate(mtd, p, oob);
+ chip->write_buf(mtd, oob, eccbytes);
+ oob += eccbytes;
+
+ if (chip->ecc.postpad) {
+ chip->write_buf(mtd, oob, chip->ecc.postpad);
+ oob += chip->ecc.postpad;
}
- ofs += mtd->oobavail;
}
- return chip->oob_buf;
+
+ /* Calculate remaining oob bytes */
+ i = mtd->oobsize - (oob - chip->oob_poi);
+ if (i)
+ chip->write_buf(mtd, oob, i);
+}
+
+/**
+ * nand_write_page - [INTERNAL] write one page
+ * @mtd: MTD device structure
+ * @chip: NAND chip descriptor
+ * @buf: the data to write
+ * @page: page number to write
+ * @cached: cached programming
+ */
+static int nand_write_page(struct mtd_info *mtd, struct nand_chip *chip,
+ const uint8_t *buf, int page, int cached)
+{
+ int status;
+
+ chip->cmdfunc(mtd, NAND_CMD_SEQIN, 0x00, page);
+
+ chip->ecc.write_page(mtd, chip, buf);
+
+ /*
+ * Cached progamming disabled for now, Not sure if its worth the
+ * trouble. The speed gain is not very impressive. (2.3->2.6Mib/s)
+ */
+ cached = 0;
+
+ if (!cached || !(chip->options & NAND_CACHEPRG)) {
+
+ chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1);
+ status = chip->waitfunc(mtd, chip);
+ /*
+ * See if operation failed and additional status checks are
+ * available
+ */
+ if ((status & NAND_STATUS_FAIL) && (chip->errstat))
+ status = chip->errstat(mtd, chip, FL_WRITING, status,
+ page);
+
+ if (status & NAND_STATUS_FAIL)
+ return -EIO;
+ } else {
+ chip->cmdfunc(mtd, NAND_CMD_CACHEDPROG, -1, -1);
+ status = chip->waitfunc(mtd, chip);
+ }
+
+#ifdef CONFIG_MTD_NAND_VERIFY_WRITE
+ /* Send command to read back the data */
+ chip->cmdfunc(mtd, NAND_CMD_READ0, 0, page);
+
+ if (chip->verify_buf(mtd, buf, mtd->writesize))
+ return -EIO;
+#endif
+ return 0;
+}
+
+/**
+ * nand_fill_oob - [Internal] Transfer client buffer to oob
+ * @chip: nand chip structure
+ * @oob: oob data buffer
+ * @ops: oob ops structure
+ */
+static uint8_t *nand_fill_oob(struct nand_chip *chip, uint8_t *oob,
+ struct mtd_oob_ops *ops)
+{
+ size_t len = ops->ooblen;
+
+ switch(ops->mode) {
+
+ case MTD_OOB_PLACE:
+ case MTD_OOB_RAW:
+ memcpy(chip->oob_poi + ops->ooboffs, oob, len);
+ return oob + len;
+
+ case MTD_OOB_AUTO: {
+ struct nand_oobfree *free = chip->ecc.layout->oobfree;
+ uint32_t boffs = 0, woffs = ops->ooboffs;
+ size_t bytes = 0;
+
+ for(; free->length && len; free++, len -= bytes) {
+ /* Write request not from offset 0 ? */
+ if (unlikely(woffs)) {
+ if (woffs >= free->length) {
+ woffs -= free->length;
+ continue;
+ }
+ boffs = free->offset + woffs;
+ bytes = min_t(size_t, len,
+ (free->length - woffs));
+ woffs = 0;
+ } else {
+ bytes = min_t(size_t, len, free->length);
+ boffs = free->offset;
+ }
+ memcpy(chip->oob_poi + boffs, oob, bytes);
+ oob += bytes;
+ }
+ return oob;
+ }
+ default:
+ BUG();
+ }
+ return NULL;
}
#define NOTALIGNED(x) (x & (mtd->writesize-1)) != 0
/**
- * nand_write - [MTD Interface] NAND write with ECC
+ * nand_do_write_ops - [Internal] NAND write with ECC
* @mtd: MTD device structure
* @to: offset to write to
- * @len: number of bytes to write
- * @retlen: pointer to variable to store the number of written bytes
- * @buf: the data to write
+ * @ops: oob operations description structure
*
* NAND write with ECC
*/
-static int nand_write(struct mtd_info *mtd, loff_t to, size_t len,
- size_t *retlen, const uint8_t *buf)
+static int nand_do_write_ops(struct mtd_info *mtd, loff_t to,
+ struct mtd_oob_ops *ops)
{
- int startpage, page, ret = -EIO, oob = 0, written = 0, chipnr;
- int autoplace = 0, numpages, totalpages;
+ int chipnr, realpage, page, blockmask;
struct nand_chip *chip = mtd->priv;
- uint8_t *oobbuf, *bufstart, *eccbuf = NULL;
- int ppblock = (1 << (chip->phys_erase_shift - chip->page_shift));
- struct nand_oobinfo *oobsel = &mtd->oobinfo;
-
- DEBUG(MTD_DEBUG_LEVEL3, "nand_write: to = 0x%08x, len = %i\n", (unsigned int)to, (int)len);
-
- /* Initialize retlen, in case of early exit */
- *retlen = 0;
+ uint32_t writelen = ops->len;
+ uint8_t *oob = ops->oobbuf;
+ uint8_t *buf = ops->datbuf;
+ int bytes = mtd->writesize;
+ int ret;
- /* Do not allow write past end of device */
- if ((to + len) > mtd->size) {
- DEBUG(MTD_DEBUG_LEVEL0, "nand_write: Attempt to write past end of page\n");
- return -EINVAL;
- }
+ ops->retlen = 0;
/* reject writes, which are not page aligned */
- if (NOTALIGNED(to) || NOTALIGNED(len)) {
- printk(KERN_NOTICE "nand_write: Attempt to write not page aligned data\n");
+ if (NOTALIGNED(to) || NOTALIGNED(ops->len)) {
+ printk(KERN_NOTICE "nand_write: "
+ "Attempt to write not page aligned data\n");
return -EINVAL;
}
- /* Grab the lock and see if the device is available */
- nand_get_device(chip, mtd, FL_WRITING);
+ if (!writelen)
+ return 0;
- /* Calculate chipnr */
chipnr = (int)(to >> chip->chip_shift);
- /* Select the NAND device */
chip->select_chip(mtd, chipnr);
/* Check, if it is write protected */
if (nand_check_wp(mtd))
- goto out;
+ return -EIO;
- /* Autoplace of oob data ? Use the default placement scheme */
- if (oobsel->useecc == MTD_NANDECC_AUTOPLACE) {
- oobsel = chip->autooob;
- autoplace = 1;
- }
- if (oobsel->useecc == MTD_NANDECC_AUTOPL_USR)
- autoplace = 1;
+ realpage = (int)(to >> chip->page_shift);
+ page = realpage & chip->pagemask;
+ blockmask = (1 << (chip->phys_erase_shift - chip->page_shift)) - 1;
- /* Setup variables and oob buffer */
- totalpages = len >> chip->page_shift;
- page = (int)(to >> chip->page_shift);
- /* Invalidate the page cache, if we write to the cached page */
- if (page <= chip->pagebuf && chip->pagebuf < (page + totalpages))
+ /* Invalidate the page cache, when we write to the cached page */
+ if (to <= (chip->pagebuf << chip->page_shift) &&
+ (chip->pagebuf << chip->page_shift) < (to + ops->len))
chip->pagebuf = -1;
- /* Set it relative to chip */
- page &= chip->pagemask;
- startpage = page;
- /* Calc number of pages we can write in one go */
- numpages = min(ppblock - (startpage & (ppblock - 1)), totalpages);
- oobbuf = nand_prepare_oobbuf(mtd, eccbuf, oobsel, autoplace, numpages);
- bufstart = (uint8_t *) buf;
-
- /* Loop until all data is written */
- while (written < len) {
-
- chip->data_poi = (uint8_t *) &buf[written];
- /* Write one page. If this is the last page to write
- * or the last page in this block, then use the
- * real pageprogram command, else select cached programming
- * if supported by the chip.
- */
- ret = nand_write_page(mtd, chip, page, &oobbuf[oob], oobsel, (--numpages > 0));
- if (ret) {
- DEBUG(MTD_DEBUG_LEVEL0, "nand_write: write_page failed %d\n", ret);
- goto out;
- }
- /* Next oob page */
- oob += mtd->oobsize;
- /* Update written bytes count */
- written += mtd->writesize;
- if (written == len)
- goto cmp;
+ chip->oob_poi = chip->buffers.oobwbuf;
- /* Increment page address */
- page++;
+ while(1) {
+ int cached = writelen > bytes && page != blockmask;
- /* Have we hit a block boundary ? Then we have to verify and
- * if verify is ok, we have to setup the oob buffer for
- * the next pages.
- */
- if (!(page & (ppblock - 1))) {
- int ofs;
- chip->data_poi = bufstart;
- ret = nand_verify_pages(mtd, this, startpage, page - startpage,
- oobbuf, oobsel, chipnr, (eccbuf != NULL));
- if (ret) {
- DEBUG(MTD_DEBUG_LEVEL0, "nand_write: verify_pages failed %d\n", ret);
- goto out;
- }
- *retlen = written;
-
- ofs = autoplace ? mtd->oobavail : mtd->oobsize;
- if (eccbuf)
- eccbuf += (page - startpage) * ofs;
- totalpages -= page - startpage;
- numpages = min(totalpages, ppblock);
- page &= chip->pagemask;
- startpage = page;
- oobbuf = nand_prepare_oobbuf(mtd, eccbuf, oobsel, autoplace, numpages);
- oob = 0;
- /* Check, if we cross a chip boundary */
- if (!page) {
- chipnr++;
- chip->select_chip(mtd, -1);
- chip->select_chip(mtd, chipnr);
- }
+ if (unlikely(oob))
+ oob = nand_fill_oob(chip, oob, ops);
+
+ ret = nand_write_page(mtd, chip, buf, page, cached);
+ if (ret)
+ break;
+
+ writelen -= bytes;
+ if (!writelen)
+ break;
+
+ buf += bytes;
+ realpage++;
+
+ page = realpage & chip->pagemask;
+ /* Check, if we cross a chip boundary */
+ if (!page) {
+ chipnr++;
+ chip->select_chip(mtd, -1);
+ chip->select_chip(mtd, chipnr);
}
}
- /* Verify the remaining pages */
- cmp:
- chip->data_poi = bufstart;
- ret = nand_verify_pages(mtd, this, startpage, totalpages, oobbuf, oobsel, chipnr, (eccbuf != NULL));
- if (!ret)
- *retlen = written;
- else
- DEBUG(MTD_DEBUG_LEVEL0, "nand_write: verify_pages failed %d\n", ret);
- out:
- /* Deselect and wake up anyone waiting on the device */
- nand_release_device(mtd);
+ if (unlikely(oob))
+ memset(chip->oob_poi, 0xff, mtd->oobsize);
+ ops->retlen = ops->len - writelen;
return ret;
}
/**
- * nand_write_oob - [MTD Interface] NAND write out-of-band
+ * nand_write - [MTD Interface] NAND write with ECC
* @mtd: MTD device structure
* @to: offset to write to
* @len: number of bytes to write
* @retlen: pointer to variable to store the number of written bytes
* @buf: the data to write
*
- * NAND write out-of-band
+ * NAND write with ECC
*/
-static int nand_write_oob(struct mtd_info *mtd, loff_t to, size_t len, size_t *retlen, const uint8_t *buf)
+static int nand_write(struct mtd_info *mtd, loff_t to, size_t len,
+ size_t *retlen, const uint8_t *buf)
{
- int column, page, status, ret = -EIO, chipnr;
struct nand_chip *chip = mtd->priv;
+ int ret;
- DEBUG(MTD_DEBUG_LEVEL3, "nand_write_oob: to = 0x%08x, len = %i\n", (unsigned int)to, (int)len);
+ /* Do not allow reads past end of device */
+ if ((to + len) > mtd->size)
+ return -EINVAL;
+ if (!len)
+ return 0;
- /* Shift to get page */
- page = (int)(to >> chip->page_shift);
- chipnr = (int)(to >> chip->chip_shift);
+ nand_get_device(chip, mtd, FL_WRITING);
+
+ chip->ops.len = len;
+ chip->ops.datbuf = (uint8_t *)buf;
+ chip->ops.oobbuf = NULL;
- /* Mask to get column */
- column = to & (mtd->oobsize - 1);
+ ret = nand_do_write_ops(mtd, to, &chip->ops);
- /* Initialize return length value */
- *retlen = 0;
+ *retlen = chip->ops.retlen;
+
+ nand_release_device(mtd);
+
+ return ret;
+}
+
+/**
+ * nand_do_write_oob - [MTD Interface] NAND write out-of-band
+ * @mtd: MTD device structure
+ * @to: offset to write to
+ * @ops: oob operation description structure
+ *
+ * NAND write out-of-band
+ */
+static int nand_do_write_oob(struct mtd_info *mtd, loff_t to,
+ struct mtd_oob_ops *ops)
+{
+ int chipnr, page, status;
+ struct nand_chip *chip = mtd->priv;
+
+ DEBUG(MTD_DEBUG_LEVEL3, "nand_write_oob: to = 0x%08x, len = %i\n",
+ (unsigned int)to, (int)ops->len);
/* Do not allow write past end of page */
- if ((column + len) > mtd->oobsize) {
- DEBUG(MTD_DEBUG_LEVEL0, "nand_write_oob: Attempt to write past end of page\n");
+ if ((ops->ooboffs + ops->len) > mtd->oobsize) {
+ DEBUG(MTD_DEBUG_LEVEL0, "nand_write_oob: "
+ "Attempt to write past end of page\n");
return -EINVAL;
}
- /* Grab the lock and see if the device is available */
- nand_get_device(chip, mtd, FL_WRITING);
-
- /* Select the NAND device */
+ chipnr = (int)(to >> chip->chip_shift);
chip->select_chip(mtd, chipnr);
- /* Reset the chip. Some chips (like the Toshiba TC5832DC found
- in one of my DiskOnChip 2000 test units) will clear the whole
- data page too if we don't do this. I have no clue why, but
- I seem to have 'fixed' it in the doc2000 driver in
- August 1999. dwmw2. */
+ /* Shift to get page */
+ page = (int)(to >> chip->page_shift);
+
+ /*
+ * Reset the chip. Some chips (like the Toshiba TC5832DC found in one
+ * of my DiskOnChip 2000 test units) will clear the whole data page too
+ * if we don't do this. I have no clue why, but I seem to have 'fixed'
+ * it in the doc2000 driver in August 1999. dwmw2.
+ */
chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1);
/* Check, if it is write protected */
if (nand_check_wp(mtd))
- goto out;
+ return -EROFS;
/* Invalidate the page cache, if we write to the cached page */
if (page == chip->pagebuf)
chip->pagebuf = -1;
- if (NAND_MUST_PAD(chip)) {
- /* Write out desired data */
- chip->cmdfunc(mtd, NAND_CMD_SEQIN, mtd->writesize, page & chip->pagemask);
- /* prepad 0xff for partial programming */
- chip->write_buf(mtd, ffchars, column);
- /* write data */
- chip->write_buf(mtd, buf, len);
- /* postpad 0xff for partial programming */
- chip->write_buf(mtd, ffchars, mtd->oobsize - (len + column));
- } else {
- /* Write out desired data */
- chip->cmdfunc(mtd, NAND_CMD_SEQIN, mtd->writesize + column, page & chip->pagemask);
- /* write data */
- chip->write_buf(mtd, buf, len);
- }
- /* Send command to program the OOB data */
- chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1);
+ chip->oob_poi = chip->buffers.oobwbuf;
+ memset(chip->oob_poi, 0xff, mtd->oobsize);
+ nand_fill_oob(chip, ops->oobbuf, ops);
+ status = chip->ecc.write_oob(mtd, chip, page & chip->pagemask);
+ memset(chip->oob_poi, 0xff, mtd->oobsize);
- status = chip->waitfunc(mtd, chip, FL_WRITING);
+ if (status)
+ return status;
- /* See if device thinks it succeeded */
- if (status & NAND_STATUS_FAIL) {
- DEBUG(MTD_DEBUG_LEVEL0, "nand_write_oob: " "Failed write, page 0x%08x\n", page);
- ret = -EIO;
- goto out;
+ ops->retlen = ops->len;
+
+ return 0;
+}
+
+/**
+ * nand_write_oob - [MTD Interface] NAND write data and/or out-of-band
+ * @mtd: MTD device structure
+ * @to: offset to write to
+ * @ops: oob operation description structure
+ */
+static int nand_write_oob(struct mtd_info *mtd, loff_t to,
+ struct mtd_oob_ops *ops)
+{
+ void (*write_page)(struct mtd_info *mtd, struct nand_chip *chip,
+ const uint8_t *buf) = NULL;
+ struct nand_chip *chip = mtd->priv;
+ int ret = -ENOTSUPP;
+
+ ops->retlen = 0;
+
+ /* Do not allow writes past end of device */
+ if ((to + ops->len) > mtd->size) {
+ DEBUG(MTD_DEBUG_LEVEL0, "nand_read_oob: "
+ "Attempt read beyond end of device\n");
+ return -EINVAL;
}
- /* Return happy */
- *retlen = len;
-#ifdef CONFIG_MTD_NAND_VERIFY_WRITE
- /* Send command to read back the data */
- chip->cmdfunc(mtd, NAND_CMD_READOOB, column, page & chip->pagemask);
+ nand_get_device(chip, mtd, FL_WRITING);
+
+ switch(ops->mode) {
+ case MTD_OOB_PLACE:
+ case MTD_OOB_AUTO:
+ break;
+
+ case MTD_OOB_RAW:
+ /* Replace the write_page algorithm temporary */
+ write_page = chip->ecc.write_page;
+ chip->ecc.write_page = nand_write_page_raw;
+ break;
- if (chip->verify_buf(mtd, buf, len)) {
- DEBUG(MTD_DEBUG_LEVEL0, "nand_write_oob: " "Failed write verify, page 0x%08x\n", page);
- ret = -EIO;
+ default:
goto out;
}
-#endif
- ret = 0;
+
+ if (!ops->datbuf)
+ ret = nand_do_write_oob(mtd, to, ops);
+ else
+ ret = nand_do_write_ops(mtd, to, ops);
+
+ if (unlikely(ops->mode == MTD_OOB_RAW))
+ chip->ecc.write_page = write_page;
out:
- /* Deselect and wake up anyone waiting on the device */
nand_release_device(mtd);
-
return ret;
}
chip->erase_cmd(mtd, page & chip->pagemask);
- status = chip->waitfunc(mtd, chip, FL_ERASING);
+ status = chip->waitfunc(mtd, chip);
/*
* See if operation failed and additional status checks are
/**
* nand_block_isbad - [MTD Interface] Check if block at offset is bad
* @mtd: MTD device structure
- * @ofs: offset relative to mtd start
+ * @offs: offset relative to mtd start
*/
static int nand_block_isbad(struct mtd_info *mtd, loff_t offs)
{
"in suspended state\n");
}
-/*
- * Free allocated data structures
- */
-static void nand_free_kmem(struct nand_chip *chip)
-{
- /* Buffer allocated by nand_scan ? */
- if (chip->options & NAND_OOBBUF_ALLOC)
- kfree(chip->oob_buf);
- /* Buffer allocated by nand_scan ? */
- if (chip->options & NAND_DATABUF_ALLOC)
- kfree(chip->data_buf);
- /* Controller allocated by nand_scan ? */
- if (chip->options & NAND_CONTROLLER_ALLOC)
- kfree(chip->controller);
-}
-
-/*
- * Allocate buffers and data structures
- */
-static int nand_allocate_kmem(struct mtd_info *mtd, struct nand_chip *chip)
-{
- size_t len;
-
- if (!chip->oob_buf) {
- len = mtd->oobsize <<
- (chip->phys_erase_shift - chip->page_shift);
- chip->oob_buf = kmalloc(len, GFP_KERNEL);
- if (!chip->oob_buf)
- goto outerr;
- chip->options |= NAND_OOBBUF_ALLOC;
- }
-
- if (!chip->data_buf) {
- len = mtd->writesize + mtd->oobsize;
- chip->data_buf = kmalloc(len, GFP_KERNEL);
- if (!chip->data_buf)
- goto outerr;
- chip->options |= NAND_DATABUF_ALLOC;
- }
-
- if (!chip->controller) {
- chip->controller = kzalloc(sizeof(struct nand_hw_control),
- GFP_KERNEL);
- if (!chip->controller)
- goto outerr;
-
- spin_lock_init(&chip->controller->lock);
- init_waitqueue_head(&chip->controller->wq);
- chip->options |= NAND_CONTROLLER_ALLOC;
- }
- return 0;
-
- outerr:
- printk(KERN_ERR "nand_scan(): Cannot allocate buffers\n");
- nand_free_kmem(chip);
- return -ENOMEM;
-}
-
/*
* Set default functions
*/
chip->verify_buf = busw ? nand_verify_buf16 : nand_verify_buf;
if (!chip->scan_bbt)
chip->scan_bbt = nand_default_bbt;
+
+ if (!chip->controller) {
+ chip->controller = &chip->hwcontrol;
+ spin_lock_init(&chip->controller->lock);
+ init_waitqueue_head(&chip->controller->wq);
+ }
+
}
/*
if (!type)
return ERR_PTR(-ENODEV);
- chip->chipsize = nand_flash_ids[i].chipsize << 20;
+ if (!mtd->name)
+ mtd->name = type->name;
+
+ chip->chipsize = type->chipsize << 20;
/* Newer devices have all the information in additional id bytes */
- if (!nand_flash_ids[i].pagesize) {
+ if (!type->pagesize) {
int extid;
/* The 3rd id byte contains non relevant data ATM */
extid = chip->read_byte(mtd);
/*
* Old devices have chip data hardcoded in the device id table
*/
- mtd->erasesize = nand_flash_ids[i].erasesize;
- mtd->writesize = nand_flash_ids[i].pagesize;
+ mtd->erasesize = type->erasesize;
+ mtd->writesize = type->pagesize;
mtd->oobsize = mtd->writesize / 32;
- busw = nand_flash_ids[i].options & NAND_BUSWIDTH_16;
+ busw = type->options & NAND_BUSWIDTH_16;
}
/* Try to identify manufacturer */
- for (maf_idx = 0; nand_manuf_ids[maf_idx].id != 0x0; maf_id++) {
+ for (maf_idx = 0; nand_manuf_ids[maf_idx].id != 0x0; maf_idx++) {
if (nand_manuf_ids[maf_idx].id == *maf_id)
break;
}
/* Get chip options, preserve non chip based options */
chip->options &= ~NAND_CHIPOPTIONS_MSK;
- chip->options |= nand_flash_ids[i].options & NAND_CHIPOPTIONS_MSK;
+ chip->options |= type->options & NAND_CHIPOPTIONS_MSK;
/*
* Set chip as a default. Board drivers can override it, if necessary
/* Check if chip is a not a samsung device. Do not clear the
* options for chips which are not having an extended id.
*/
- if (*maf_id != NAND_MFR_SAMSUNG && !nand_flash_ids[i].pagesize)
+ if (*maf_id != NAND_MFR_SAMSUNG && !type->pagesize)
chip->options &= ~NAND_SAMSUNG_LP_OPTIONS;
/* Check for AND chips with 4 page planes */
* This fills out all the uninitialized function pointers
* with the defaults.
* The flash ID is read and the mtd/chip structures are
- * filled with the appropriate values. Buffers are allocated if
- * they are not provided by the board driver
+ * filled with the appropriate values.
* The mtd->owner field must be set to the module of the caller
*
*/
chip->numchips = i;
mtd->size = i * chip->chipsize;
- /* Allocate buffers and data structures */
- if (nand_allocate_kmem(mtd, chip))
- return -ENOMEM;
-
- /* Preset the internal oob buffer */
- memset(chip->oob_buf, 0xff,
- mtd->oobsize << (chip->phys_erase_shift - chip->page_shift));
+ /* Preset the internal oob write buffer */
+ memset(chip->buffers.oobwbuf, 0xff, mtd->oobsize);
/*
* If no default placement scheme is given, select an appropriate one
*/
- if (!chip->autooob) {
+ if (!chip->ecc.layout) {
switch (mtd->oobsize) {
case 8:
- chip->autooob = &nand_oob_8;
+ chip->ecc.layout = &nand_oob_8;
break;
case 16:
- chip->autooob = &nand_oob_16;
+ chip->ecc.layout = &nand_oob_16;
break;
case 64:
- chip->autooob = &nand_oob_64;
+ chip->ecc.layout = &nand_oob_64;
break;
default:
printk(KERN_WARNING "No oob scheme defined for "
}
}
- /*
- * The number of bytes available for the filesystem to place fs
- * dependend oob data
- */
- mtd->oobavail = 0;
- for (i = 0; chip->autooob->oobfree[i][1]; i++)
- mtd->oobavail += chip->autooob->oobfree[i][1];
-
/*
* check ECC mode, default to software if 3byte/512byte hardware ECC is
* selected and we have 256 byte pagesize fallback to software ECC
*/
switch (chip->ecc.mode) {
case NAND_ECC_HW:
+ /* Use standard hwecc read page function ? */
+ if (!chip->ecc.read_page)
+ chip->ecc.read_page = nand_read_page_hwecc;
+ if (!chip->ecc.write_page)
+ chip->ecc.write_page = nand_write_page_hwecc;
+ if (!chip->ecc.read_oob)
+ chip->ecc.read_oob = nand_read_oob_std;
+ if (!chip->ecc.write_oob)
+ chip->ecc.write_oob = nand_write_oob_std;
+
case NAND_ECC_HW_SYNDROME:
if (!chip->ecc.calculate || !chip->ecc.correct ||
!chip->ecc.hwctl) {
"Hardware ECC not possible\n");
BUG();
}
+ /* Use standard syndrome read/write page function ? */
+ if (!chip->ecc.read_page)
+ chip->ecc.read_page = nand_read_page_syndrome;
+ if (!chip->ecc.write_page)
+ chip->ecc.write_page = nand_write_page_syndrome;
+ if (!chip->ecc.read_oob)
+ chip->ecc.read_oob = nand_read_oob_syndrome;
+ if (!chip->ecc.write_oob)
+ chip->ecc.write_oob = nand_write_oob_syndrome;
+
if (mtd->writesize >= chip->ecc.size)
break;
printk(KERN_WARNING "%d byte HW ECC not possible on "
case NAND_ECC_SOFT:
chip->ecc.calculate = nand_calculate_ecc;
chip->ecc.correct = nand_correct_data;
+ chip->ecc.read_page = nand_read_page_swecc;
+ chip->ecc.write_page = nand_write_page_swecc;
+ chip->ecc.read_oob = nand_read_oob_std;
+ chip->ecc.write_oob = nand_write_oob_std;
chip->ecc.size = 256;
chip->ecc.bytes = 3;
break;
case NAND_ECC_NONE:
printk(KERN_WARNING "NAND_ECC_NONE selected by board driver. "
"This is not recommended !!\n");
+ chip->ecc.read_page = nand_read_page_raw;
+ chip->ecc.write_page = nand_write_page_raw;
+ chip->ecc.read_oob = nand_read_oob_std;
+ chip->ecc.write_oob = nand_write_oob_std;
chip->ecc.size = mtd->writesize;
chip->ecc.bytes = 0;
break;
BUG();
}
+ /*
+ * The number of bytes available for a client to place data into
+ * the out of band area
+ */
+ chip->ecc.layout->oobavail = 0;
+ for (i = 0; chip->ecc.layout->oobfree[i].length; i++)
+ chip->ecc.layout->oobavail +=
+ chip->ecc.layout->oobfree[i].length;
+
/*
* Set the number of read / write steps for one page depending on ECC
* mode
printk(KERN_WARNING "Invalid ecc parameters\n");
BUG();
}
+ chip->ecc.total = chip->ecc.steps * chip->ecc.bytes;
/* Initialize state */
chip->state = FL_READY;
mtd->block_isbad = nand_block_isbad;
mtd->block_markbad = nand_block_markbad;
- /* and make the autooob the default one */
- memcpy(&mtd->oobinfo, chip->autooob, sizeof(mtd->oobinfo));
+ /* propagate ecc.layout to mtd_info */
+ mtd->ecclayout = chip->ecc.layout;
/* Check, if we should skip the bad block table scan */
if (chip->options & NAND_SKIP_BBTSCAN)
/* Free bad block table memory */
kfree(chip->bbt);
- /* Free buffers */
- nand_free_kmem(chip);
}
EXPORT_SYMBOL_GPL(nand_scan);
projects / powerpc.git / blobdiff