Linux v2.6.16-rc2

[powerpc.git] / drivers / pci / pci.c

diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index 259d247..d2d1879 100644 (file)
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -15,9 +15,11 @@
 #include <linux/pci.h>
 #include <linux/module.h>
 #include <linux/spinlock.h>
+#include <linux/string.h>
 #include <asm/dma.h>   /* isa_dma_bridge_buggy */
 #include "pci.h"
 
+#if 0
 
 /**
  * pci_bus_max_busnr - returns maximum PCI bus number of given bus' children
@@ -62,11 +64,40 @@ pci_max_busnr(void)
        return max;
 }
 
+#endif  /*  0  */
+
+static int __pci_find_next_cap(struct pci_bus *bus, unsigned int devfn, u8 pos, int cap)
+{
+       u8 id;
+       int ttl = 48;
+
+       while (ttl--) {
+               pci_bus_read_config_byte(bus, devfn, pos, &pos);
+               if (pos < 0x40)
+                       break;
+               pos &= ~3;
+               pci_bus_read_config_byte(bus, devfn, pos + PCI_CAP_LIST_ID,
+                                        &id);
+               if (id == 0xff)
+                       break;
+               if (id == cap)
+                       return pos;
+               pos += PCI_CAP_LIST_NEXT;
+       }
+       return 0;
+}
+
+int pci_find_next_capability(struct pci_dev *dev, u8 pos, int cap)
+{
+       return __pci_find_next_cap(dev->bus, dev->devfn,
+                                  pos + PCI_CAP_LIST_NEXT, cap);
+}
+EXPORT_SYMBOL_GPL(pci_find_next_capability);
+
 static int __pci_bus_find_cap(struct pci_bus *bus, unsigned int devfn, u8 hdr_type, int cap)
 {
        u16 status;
-       u8 pos, id;
-       int ttl = 48;
+       u8 pos;
 
        pci_bus_read_config_word(bus, devfn, PCI_STATUS, &status);
        if (!(status & PCI_STATUS_CAP_LIST))
@@ -75,24 +106,15 @@ static int __pci_bus_find_cap(struct pci_bus *bus, unsigned int devfn, u8 hdr_ty
        switch (hdr_type) {
        case PCI_HEADER_TYPE_NORMAL:
        case PCI_HEADER_TYPE_BRIDGE:
-               pci_bus_read_config_byte(bus, devfn, PCI_CAPABILITY_LIST, &pos);
+               pos = PCI_CAPABILITY_LIST;
                break;
        case PCI_HEADER_TYPE_CARDBUS:
-               pci_bus_read_config_byte(bus, devfn, PCI_CB_CAPABILITY_LIST, &pos);
+               pos = PCI_CB_CAPABILITY_LIST;
                break;
        default:
                return 0;
        }
-       while (ttl-- && pos >= 0x40) {
-               pos &= ~3;
-               pci_bus_read_config_byte(bus, devfn, pos + PCI_CAP_LIST_ID, &id);
-               if (id == 0xff)
-                       break;
-               if (id == cap)
-                       return pos;
-               pci_bus_read_config_byte(bus, devfn, pos + PCI_CAP_LIST_NEXT, &pos);
-       }
-       return 0;
+       return __pci_find_next_cap(bus, devfn, pos, cap);
 }
 
 /**
@@ -141,6 +163,7 @@ int pci_bus_find_capability(struct pci_bus *bus, unsigned int devfn, int cap)
        return __pci_bus_find_cap(bus, devfn, hdr_type & 0x7f, cap);
 }
 
+#if 0
 /**
  * pci_find_ext_capability - Find an extended capability
  * @dev: PCI device to query
@@ -188,6 +211,7 @@ int pci_find_ext_capability(struct pci_dev *dev, int cap)
 
        return 0;
 }
+#endif  /*  0  */
 
 /**
  * pci_find_parent_resource - return resource region of parent bus of given region
@@ -252,6 +276,8 @@ pci_restore_bars(struct pci_dev *dev)
                pci_update_resource(dev, &dev->resource[i], i);
 }
 
+int (*platform_pci_set_power_state)(struct pci_dev *dev, pci_power_t t);
+
 /**
  * pci_set_power_state - Set the power state of a PCI device
  * @dev: PCI device to be suspended
@@ -266,7 +292,6 @@ pci_restore_bars(struct pci_dev *dev)
  * -EIO if device does not support PCI PM.
  * 0 if we can successfully change the power state.
  */
-int (*platform_pci_set_power_state)(struct pci_dev *dev, pci_power_t t);
 int
 pci_set_power_state(struct pci_dev *dev, pci_power_t state)
 {
@@ -314,19 +339,19 @@ pci_set_power_state(struct pci_dev *dev, pci_power_t state)
         * sets PowerState to 0.
         */
        switch (dev->current_state) {
+       case PCI_D0:
+       case PCI_D1:
+       case PCI_D2:
+               pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
+               pmcsr |= state;
+               break;
        case PCI_UNKNOWN: /* Boot-up */
                if ((pmcsr & PCI_PM_CTRL_STATE_MASK) == PCI_D3hot
                 && !(pmcsr & PCI_PM_CTRL_NO_SOFT_RESET))
                        need_restore = 1;
                /* Fall-through: force to D0 */
-       case PCI_D3hot:
-       case PCI_D3cold:
-       case PCI_POWER_ERROR:
-               pmcsr = 0;
-               break;
        default:
-               pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
-               pmcsr |= state;
+               pmcsr = 0;
                break;
        }
 
@@ -567,7 +592,7 @@ pci_get_interrupt_pin(struct pci_dev *dev, struct pci_dev **bridge)
 {
        u8 pin;
 
-       pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
+       pin = dev->pin;
        if (!pin)
                return -1;
        pin--;
@@ -808,8 +833,8 @@ pci_clear_mwi(struct pci_dev *dev)
 
 /**
  * pci_intx - enables/disables PCI INTx for device dev
- * @dev: the PCI device to operate on
- * @enable: boolean
+ * @pdev: the PCI device to operate on
+ * @enable: boolean: whether to enable or disable PCI INTx
  *
  * Enables/disables PCI INTx for device dev
  */
@@ -897,8 +922,6 @@ EXPORT_SYMBOL_GPL(pci_restore_bars);
 EXPORT_SYMBOL(pci_enable_device_bars);
 EXPORT_SYMBOL(pci_enable_device);
 EXPORT_SYMBOL(pci_disable_device);
-EXPORT_SYMBOL(pci_max_busnr);
-EXPORT_SYMBOL(pci_bus_max_busnr);
 EXPORT_SYMBOL(pci_find_capability);
 EXPORT_SYMBOL(pci_bus_find_capability);
 EXPORT_SYMBOL(pci_release_regions);