#define MBA_IP_RCV_BUFFER_EMPTY 0x8026 /* IP receive buffer queue empty. */
#define MBA_IP_HDR_DATA_SPLIT 0x8027 /* IP header/data splitting feature */
/* used. */
+#define MBA_TRACE_NOTIFICATION 0x8028 /* Trace/Diagnostic notification. */
#define MBA_POINT_TO_POINT 0x8030 /* Point to point mode. */
#define MBA_CMPLT_1_16BIT 0x8031 /* Completion 1 16bit IOSB. */
#define MBA_CMPLT_2_16BIT 0x8032 /* Completion 2 16bit IOSB. */
*/
#define MBC_SERDES_PARAMS 0x10 /* Serdes Tx Parameters. */
#define MBC_GET_IOCB_STATUS 0x12 /* Get IOCB status command. */
+#define MBC_PORT_PARAMS 0x1A /* Port iDMA Parameters. */
#define MBC_GET_TIMEOUT_PARAMS 0x22 /* Get FW timeouts. */
+#define MBC_TRACE_CONTROL 0x27 /* Trace control command. */
#define MBC_GEN_SYSTEM_ERROR 0x2a /* Generate System Error. */
+#define MBC_READ_SFP 0x31 /* Read SFP Data. */
#define MBC_SET_TIMEOUT_PARAMS 0x32 /* Set FW timeouts. */
#define MBC_MID_INITIALIZE_FIRMWARE 0x48 /* MID Initialize firmware. */
#define MBC_MID_GET_VP_DATABASE 0x49 /* MID Get VP Database. */
#define MBC_GET_LINK_PRIV_STATS 0x6d /* Get link & private data. */
#define MBC_SET_VENDOR_ID 0x76 /* Set Vendor ID. */
+#define TC_ENABLE 4
+#define TC_DISABLE 5
+
/* Firmware return data sizes */
#define FCAL_MAP_SIZE 128
port_id_t d_id;
uint8_t node_name[WWN_SIZE];
uint8_t port_name[WWN_SIZE];
+ uint8_t fabric_port_name[WWN_SIZE];
+ uint16_t fp_speeds;
+ uint16_t fp_speed;
} sw_info_t;
/*
uint16_t loop_id;
uint16_t old_loop_id;
+ uint8_t fabric_port_name[WWN_SIZE];
+ uint16_t fp_speed;
+
fc_port_type_t port_type;
atomic_t state;
spinlock_t rport_lock;
struct fc_rport *rport, *drport;
u32 supported_classes;
+
+ unsigned long last_queue_full;
+ unsigned long last_ramp_up;
} fc_port_t;
/*
#define CT_REJECT_RESPONSE 0x8001
#define CT_ACCEPT_RESPONSE 0x8002
+#define CT_REASON_INVALID_COMMAND_CODE 0x01
#define CT_REASON_CANNOT_PERFORM 0x09
#define CT_EXPL_ALREADY_REGISTERED 0x10
#define RSNN_NN_REQ_SIZE (16 + 8 + 1 + 255)
#define RSNN_NN_RSP_SIZE 16
+#define GFPN_ID_CMD 0x11C
+#define GFPN_ID_REQ_SIZE (16 + 4)
+#define GFPN_ID_RSP_SIZE (16 + 8)
+
+#define GPSC_CMD 0x127
+#define GPSC_REQ_SIZE (16 + 8)
+#define GPSC_RSP_SIZE (16 + 2 + 2)
+
+
/*
* HBA attribute types.
*/
uint8_t reserved[3];
union {
- /* GA_NXT, GPN_ID, GNN_ID, GFT_ID */
+ /* GA_NXT, GPN_ID, GNN_ID, GFT_ID, GFPN_ID */
struct {
uint8_t reserved;
uint8_t port_id[3];
struct {
uint8_t port_name[8];
} dpa;
+
+ struct {
+ uint8_t port_name[8];
+ } gpsc;
} req;
};
uint8_t port_name[8];
struct ct_fdmi_hba_attributes attrs;
} ghat;
+
+ struct {
+ uint8_t port_name[8];
+ } gfpn_id;
+
+ struct {
+ uint16_t speeds;
+ uint16_t speed;
+ } gpsc;
} rsp;
};
char * (*pci_info_str) (struct scsi_qla_host *, char *);
char * (*fw_version_str) (struct scsi_qla_host *, char *);
- irqreturn_t (*intr_handler) (int, void *, struct pt_regs *);
+ irq_handler_t intr_handler;
void (*enable_intrs) (struct scsi_qla_host *);
void (*disable_intrs) (struct scsi_qla_host *);
uint32_t);
void (*fw_dump) (struct scsi_qla_host *, int);
- void (*ascii_fw_dump) (struct scsi_qla_host *);
int (*beacon_on) (struct scsi_qla_host *);
int (*beacon_off) (struct scsi_qla_host *);
uint32_t, uint32_t);
int (*write_optrom) (struct scsi_qla_host *, uint8_t *, uint32_t,
uint32_t);
+
+ int (*get_flash_version) (struct scsi_qla_host *, void *);
+};
+
+/* MSI-X Support *************************************************************/
+
+#define QLA_MSIX_CHIP_REV_24XX 3
+#define QLA_MSIX_FW_MODE(m) (((m) & (BIT_7|BIT_8|BIT_9)) >> 7)
+#define QLA_MSIX_FW_MODE_1(m) (QLA_MSIX_FW_MODE(m) == 1)
+
+#define QLA_MSIX_DEFAULT 0x00
+#define QLA_MSIX_RSP_Q 0x01
+
+#define QLA_MSIX_ENTRIES 2
+#define QLA_MIDX_DEFAULT 0
+#define QLA_MIDX_RSP_Q 1
+
+struct scsi_qla_host;
+
+struct qla_msix_entry {
+ int have_irq;
+ uint16_t msix_vector;
+ uint16_t msix_entry;
};
/*
uint32_t enable_lip_full_login :1;
uint32_t enable_target_reset :1;
uint32_t enable_led_scheme :1;
+ uint32_t inta_enabled :1;
uint32_t msi_enabled :1;
uint32_t msix_enabled :1;
+ uint32_t disable_serdes :1;
+ uint32_t gpsc_supported :1;
} flags;
atomic_t loop_state;
uint16_t max_public_loop_ids;
uint16_t min_external_loopid; /* First external loop Id */
+#define PORT_SPEED_UNKNOWN 0xFFFF
+#define PORT_SPEED_1GB 0x00
+#define PORT_SPEED_2GB 0x01
+#define PORT_SPEED_4GB 0x03
uint16_t link_data_rate; /* F/W operating speed */
-#define LDR_1GB 0
-#define LDR_2GB 1
-#define LDR_4GB 3
-#define LDR_UNKNOWN 0xFFFF
uint8_t current_topology;
uint8_t prev_topology;
uint16_t mgmt_svr_loop_id;
uint32_t login_retry_count;
+ int max_q_depth;
/* Fibre Channel Device List. */
struct list_head fcports;
struct sns_cmd_pkt *sns_cmd;
dma_addr_t sns_cmd_dma;
+#define SFP_DEV_SIZE 256
+#define SFP_BLOCK_SIZE 64
+ void *sfp_data;
+ dma_addr_t sfp_data_dma;
+
struct task_struct *dpc_thread;
uint8_t dpc_active; /* DPC routine is active */
#define MBX_INTR_WAIT 2
#define MBX_UPDATE_FLASH_ACTIVE 3
- spinlock_t mbx_reg_lock; /* Mbx Cmd Register Lock */
-
struct semaphore mbx_cmd_sem; /* Serialialize mbx access */
struct semaphore mbx_intr_sem; /* Used for completion notification */
uint16_t fw_seriallink_options24[4];
/* Firmware dump information. */
- void *fw_dump;
+ struct qla2xxx_fw_dump *fw_dump;
+ uint32_t fw_dump_len;
int fw_dumped;
int fw_dump_reading;
- char *fw_dump_buffer;
- int fw_dump_buffer_len;
+ dma_addr_t eft_dma;
+ void *eft;
uint8_t host_str[16];
uint32_t pci_attr;
+ uint16_t chip_revision;
uint16_t product_id[4];
uint8_t *node_name;
uint8_t *port_name;
+ uint8_t fabric_node_name[WWN_SIZE];
uint32_t isp_abort_cnt;
/* Option ROM information. */
#define QLA_SREADING 1
#define QLA_SWRITING 2
+ /* PCI expansion ROM image information. */
+#define ROM_CODE_TYPE_BIOS 0
+#define ROM_CODE_TYPE_FCODE 1
+#define ROM_CODE_TYPE_EFI 3
+ uint8_t bios_revision[2];
+ uint8_t efi_revision[2];
+ uint8_t fcode_revision[16];
+ uint32_t fw_revision[4];
+
/* Needed for BEACON */
uint16_t beacon_blink_led;
uint8_t beacon_color_state;
uint16_t zio_mode;
uint16_t zio_timer;
struct fc_host_statistics fc_host_stat;
+
+ struct qla_msix_entry msix_entries[QLA_MSIX_ENTRIES];
} scsi_qla_host_t;
projects / powerpc.git / blobdiff