Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/shaggy...

[powerpc.git] / include / asm-arm / arch-realview / entry-macro.S

diff --git a/include/asm-arm/arch-realview/entry-macro.S b/include/asm-arm/arch-realview/entry-macro.S
index 2712ba7..1a6eec8 100644 (file)
--- a/include/asm-arm/arch-realview/entry-macro.S
+++ b/include/asm-arm/arch-realview/entry-macro.S
@@ -7,7 +7,7 @@
  * License version 2. This program is licensed "as is" without any
  * warranty of any kind, whether express or implied.
  */
-
+#include <asm/hardware.h>
 #include <asm/hardware/gic.h>
 
                .macro  disable_fiq
@@ -47,3 +47,28 @@
                cmpcs   \irqnr, \irqnr
 
                .endm
+
+               /* We assume that irqstat (the raw value of the IRQ acknowledge
+                * register) is preserved from the macro above.
+                * If there is an IPI, we immediately signal end of interrupt on the
+                * controller, since this requires the original irqstat value which
+                * we won't easily be able to recreate later.
+                */
+
+               .macro test_for_ipi, irqnr, irqstat, base, tmp
+               bic     \irqnr, \irqstat, #0x1c00
+               cmp     \irqnr, #16
+               strcc   \irqstat, [\base, #GIC_CPU_EOI]
+               cmpcs   \irqnr, \irqnr
+               .endm
+
+               /* As above, this assumes that irqstat and base are preserved.. */
+
+               .macro test_for_ltirq, irqnr, irqstat, base, tmp
+               bic     \irqnr, \irqstat, #0x1c00
+               mov     \tmp, #0
+               cmp     \irqnr, #29
+               moveq   \tmp, #1
+               streq   \irqstat, [\base, #GIC_CPU_EOI]
+               cmp     \tmp, #0
+               .endm