[MIPS] JMR3927 build fixes for the RTC code.

[powerpc.git] / include / asm-mips / cpu.h

diff --git a/include/asm-mips/cpu.h b/include/asm-mips/cpu.h
index 48eac29..818b9a9 100644 (file)
--- a/include/asm-mips/cpu.h
+++ b/include/asm-mips/cpu.h
@@ -204,16 +204,18 @@
  */
 #define MIPS_CPU_ISA_I         0x00000001
 #define MIPS_CPU_ISA_II                0x00000002
-#define MIPS_CPU_ISA_III       0x00008003
-#define MIPS_CPU_ISA_IV                0x00008004
-#define MIPS_CPU_ISA_V         0x00008005
-#define MIPS_CPU_ISA_M32       0x00000020
-#define MIPS_CPU_ISA_M64       0x00008040
+#define MIPS_CPU_ISA_III       0x00000004
+#define MIPS_CPU_ISA_IV                0x00000008
+#define MIPS_CPU_ISA_V         0x00000010
+#define MIPS_CPU_ISA_M32R1     0x00000020
+#define MIPS_CPU_ISA_M32R2     0x00000040
+#define MIPS_CPU_ISA_M64R1     0x00000080
+#define MIPS_CPU_ISA_M64R2     0x00000100
 
-/*
- * Bit 15 encodes if an ISA level supports 64-bit operations.
- */
-#define MIPS_CPU_ISA_64BIT     0x00008000
+#define MIPS_CPU_ISA_32BIT (MIPS_CPU_ISA_I | MIPS_CPU_ISA_II | \
+       MIPS_CPU_ISA_M32R1 | MIPS_CPU_ISA_M32R2 )
+#define MIPS_CPU_ISA_64BIT (MIPS_CPU_ISA_III | MIPS_CPU_ISA_IV | \
+       MIPS_CPU_ISA_V | MIPS_CPU_ISA_M64R1 | MIPS_CPU_ISA_M64R2)
 
 /*
  * CPU Option encodings