[IRDA]: IrDA prototype fixes

[powerpc.git] / include / asm-ppc64 / processor.h

diff --git a/include/asm-ppc64/processor.h b/include/asm-ppc64/processor.h
index af28aa5..7bd4796 100644 (file)
--- a/include/asm-ppc64/processor.h
+++ b/include/asm-ppc64/processor.h
@@ -20,6 +20,7 @@
 #include <asm/ptrace.h>
 #include <asm/types.h>
 #include <asm/systemcfg.h>
+#include <asm/cputable.h>
 
 /* Machine State Register (MSR) Fields */
 #define MSR_SF_LG      63              /* Enable 64 bit mode */
@@ -267,6 +268,7 @@
 #define PV_970FX       0x003C
 #define        PV_630          0x0040
 #define        PV_630p         0x0041
+#define        PV_970MP        0x0044
 #define        PV_BE           0x0070
 
 /* Platforms supported by PPC64 */
@@ -381,8 +383,8 @@ extern long kernel_thread(int (*fn)(void *), void *arg, unsigned long flags);
 extern struct task_struct *last_task_used_math;
 extern struct task_struct *last_task_used_altivec;
 
-/* 64-bit user address space is 41-bits (2TBs user VM) */
-#define TASK_SIZE_USER64 (0x0000020000000000UL)
+/* 64-bit user address space is 44-bits (16TB user VM) */
+#define TASK_SIZE_USER64 (0x0000100000000000UL)
 
 /* 
  * 32-bit user address space is 4GB - 1 page 
@@ -501,24 +503,37 @@ static inline void ppc64_runlatch_on(void)
 {
        unsigned long ctrl;
 
-       ctrl = mfspr(SPRN_CTRLF);
-       ctrl |= CTRL_RUNLATCH;
-       mtspr(SPRN_CTRLT, ctrl);
+       if (cpu_has_feature(CPU_FTR_CTRL)) {
+               ctrl = mfspr(SPRN_CTRLF);
+               ctrl |= CTRL_RUNLATCH;
+               mtspr(SPRN_CTRLT, ctrl);
+       }
 }
 
 static inline void ppc64_runlatch_off(void)
 {
        unsigned long ctrl;
 
-       ctrl = mfspr(SPRN_CTRLF);
-       ctrl &= ~CTRL_RUNLATCH;
-       mtspr(SPRN_CTRLT, ctrl);
+       if (cpu_has_feature(CPU_FTR_CTRL)) {
+               ctrl = mfspr(SPRN_CTRLF);
+               ctrl &= ~CTRL_RUNLATCH;
+               mtspr(SPRN_CTRLT, ctrl);
+       }
 }
 
 #endif /* __KERNEL__ */
 
 #endif /* __ASSEMBLY__ */
 
+#ifdef __KERNEL__
+#define RUNLATCH_ON(REG)                       \
+BEGIN_FTR_SECTION                              \
+       mfspr   (REG),SPRN_CTRLF;               \
+       ori     (REG),(REG),CTRL_RUNLATCH;      \
+       mtspr   SPRN_CTRLT,(REG);               \
+END_FTR_SECTION_IFSET(CPU_FTR_CTRL)
+#endif
+
 /*
  * Number of entries in the SLB. If this ever changes we should handle
  * it with a use a cpu feature fixup.