sh: Correct SH-5 instruction size value.
[powerpc.git] / include / asm-sh / addrspace.h
index dbb05d1..cb9da99 100644 (file)
@@ -9,16 +9,13 @@
  */
 #ifndef __ASM_SH_ADDRSPACE_H
 #define __ASM_SH_ADDRSPACE_H
+
 #ifdef __KERNEL__
 
 #include <asm/cpu/addrspace.h>
 
-/* Memory segments (32bit Priviledged mode addresses)  */
-#define P0SEG          0x00000000
-#define P1SEG          0x80000000
-#define P2SEG          0xa0000000
-#define P3SEG          0xc0000000
-#define P4SEG          0xe0000000
+/* If this CPU supports segmentation, hook up the helpers */
+#ifdef P1SEG
 
 /* Returns the privileged segment base of a given address  */
 #define PXSEG(a)       (((unsigned long)(a)) & 0xe0000000)
 /*
  * Map an address to a certain privileged segment
  */
-#define P1SEGADDR(a)   ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P1SEG))
-#define P2SEGADDR(a)   ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P2SEG))
-#define P3SEGADDR(a)   ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P3SEG))
-#define P4SEGADDR(a)   ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P4SEG))
+#define P1SEGADDR(a)   \
+       ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P1SEG))
+#define P2SEGADDR(a)   \
+       ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P2SEG))
+#define P3SEGADDR(a)   \
+       ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P3SEG))
+#define P4SEGADDR(a)   \
+       ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P4SEG))
+
+#endif /* P1SEG */
 
 #endif /* __KERNEL__ */
 #endif /* __ASM_SH_ADDRSPACE_H */