Merge rsync://rsync.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6

[powerpc.git] / include / asm-sparc / system.h

diff --git a/include/asm-sparc/system.h b/include/asm-sparc/system.h
index 898562e..58dd162 100644 (file)
--- a/include/asm-sparc/system.h
+++ b/include/asm-sparc/system.h
@@ -9,7 +9,6 @@
 #include <linux/threads.h>     /* NR_CPUS */
 #include <linux/thread_info.h>
 
-#include <asm/segment.h>
 #include <asm/page.h>
 #include <asm/psr.h>
 #include <asm/ptrace.h>
@@ -156,7 +155,7 @@ extern void fpsave(unsigned long *fpregs, unsigned long *fsr,
        "here:\n"                                                                       \
         : "=&r" (last)                                                                 \
         : "r" (&(current_set[hard_smp_processor_id()])),       \
-         "r" ((next)->thread_info),                            \
+         "r" (task_thread_info(next)),                         \
          "i" (TI_KPSR),                                        \
          "i" (TI_KSP),                                         \
          "i" (TI_TASK)                                         \
@@ -166,6 +165,16 @@ extern void fpsave(unsigned long *fpregs, unsigned long *fsr,
          "o0", "o1", "o2", "o3",                   "o7");      \
        } while(0)
 
+/*
+ * On SMP systems, when the scheduler does migration-cost autodetection,
+ * it needs a way to flush as much of the CPU's caches as possible.
+ *
+ * TODO: fill this in!
+ */
+static inline void sched_cacheflush(void)
+{
+}
+
 /*
  * Changing the IRQ level on the Sparc.
  */
@@ -205,7 +214,7 @@ static inline unsigned long getipl(void)
 BTFIXUPDEF_CALL(void, ___xchg32, void)
 #endif
 
-extern __inline__ unsigned long xchg_u32(__volatile__ unsigned long *m, unsigned long val)
+static inline unsigned long xchg_u32(__volatile__ unsigned long *m, unsigned long val)
 {
 #ifdef CONFIG_SMP
        __asm__ __volatile__("swap [%2], %0"