cores: Updated comparators

[simavr] / simavr / cores / sim_megax4.h

diff --git a/simavr/cores/sim_megax4.h b/simavr/cores/sim_megax4.h
index 7af0bc6..6fd27ed 100644 (file)
--- a/simavr/cores/sim_megax4.h
+++ b/simavr/cores/sim_megax4.h
@@ -219,6 +219,8 @@ struct mcu_t SIM_CORENAME = {
                .comp = {
                        [AVR_TIMER_COMPA] = {
                                .r_ocr = OCR0A,
+                               .com = AVR_IO_REGBITS(TCCR0A, COM0A0, 0x3),
+                               .com_pin = AVR_IO_REGBIT(PORTB, 3),
                                .interrupt = {
                                        .enable = AVR_IO_REGBIT(TIMSK0, OCIE0A),
                                        .raised = AVR_IO_REGBIT(TIFR0, OCF0A),
@@ -227,6 +229,8 @@ struct mcu_t SIM_CORENAME = {
                        },
                        [AVR_TIMER_COMPB] = {
                                .r_ocr = OCR0B,
+                               .com = AVR_IO_REGBITS(TCCR0A, COM0B0, 0x3),
+                               .com_pin = AVR_IO_REGBIT(PORTB, 4),
                                .interrupt = {
                                        .enable = AVR_IO_REGBIT(TIMSK0, OCIE0B),
                                        .raised = AVR_IO_REGBIT(TIFR0, OCF0B),
@@ -272,6 +276,8 @@ struct mcu_t SIM_CORENAME = {
                        [AVR_TIMER_COMPA] = {
                                .r_ocr = OCR1AL,
                                .r_ocrh = OCR1AH,       // 16 bits timers have two bytes of it
+                               .com = AVR_IO_REGBITS(TCCR1A, COM1A0, 0x3),
+                               .com_pin = AVR_IO_REGBIT(PORTD, 5),
                                .interrupt = {
                                        .enable = AVR_IO_REGBIT(TIMSK1, OCIE1A),
                                        .raised = AVR_IO_REGBIT(TIFR1, OCF1A),
@@ -281,6 +287,8 @@ struct mcu_t SIM_CORENAME = {
                        [AVR_TIMER_COMPB] = {
                                .r_ocr = OCR1BL,
                                .r_ocrh = OCR1BH,
+                               .com = AVR_IO_REGBITS(TCCR1A, COM1B0, 0x3),
+                               .com_pin = AVR_IO_REGBIT(PORTD, 4),
                                .interrupt = {
                                        .enable = AVR_IO_REGBIT(TIMSK1, OCIE1B),
                                        .raised = AVR_IO_REGBIT(TIFR1, OCF1B),
@@ -314,6 +322,8 @@ struct mcu_t SIM_CORENAME = {
                .comp = {
                        [AVR_TIMER_COMPA] = {
                                .r_ocr = OCR2A,
+                               .com = AVR_IO_REGBITS(TCCR2A, COM2A0, 0x3),
+                               .com_pin = AVR_IO_REGBIT(PORTD, 7),
                                .interrupt = {
                                        .enable = AVR_IO_REGBIT(TIMSK2, OCIE2A),
                                        .raised = AVR_IO_REGBIT(TIFR2, OCF2A),
@@ -322,6 +332,8 @@ struct mcu_t SIM_CORENAME = {
                        },
                        [AVR_TIMER_COMPB] = {
                                .r_ocr = OCR2B,
+                               .com = AVR_IO_REGBITS(TCCR2A, COM2B0, 0x3),
+                               .com_pin = AVR_IO_REGBIT(PORTD, 6),
                                .interrupt = {
                                        .enable = AVR_IO_REGBIT(TIMSK2, OCIE2B),
                                        .raised = AVR_IO_REGBIT(TIFR2, OCF2B),