along with simavr. If not, see <http://www.gnu.org/licenses/>.
*/
-#include </usr/include/stdio.h>
#include "sim_core_declare.h"
#include "avr_eeprom.h"
+#include "avr_watchdog.h"
#include "avr_extint.h"
#include "avr_ioport.h"
#include "avr_uart.h"
/*
* This is a template for all of the tinyx5 devices, hopefully
*/
-static struct mcu_t {
+static const struct mcu_t {
avr_t core;
avr_eeprom_t eeprom;
+ avr_watchdog_t watchdog;
avr_extint_t extint;
- avr_ioport_t portb, portd;
+ avr_ioport_t porta, portb, portd;
avr_uart_t uart;
avr_timer_t timer0,timer1;
} mcu = {
.reset = reset,
},
AVR_EEPROM_DECLARE_8BIT(EEPROM_READY_vect),
+ AVR_WATCHDOG_DECLARE(WDTCSR, WDT_OVERFLOW_vect),
.extint = {
AVR_EXTINT_TINY_DECLARE(0, 'D', 2, EIFR),
AVR_EXTINT_TINY_DECLARE(1, 'D', 3, EIFR),
},
+ .porta = { // port A has no PCInts..
+ .name = 'A', .r_port = PORTA, .r_ddr = DDRA, .r_pin = PINA,
+ },
.portb = {
.name = 'B', .r_port = PORTB, .r_ddr = DDRB, .r_pin = PINB,
.pcint = {
.txen = AVR_IO_REGBIT(UCSRB, TXEN),
.rxen = AVR_IO_REGBIT(UCSRB, RXEN),
+ .ucsz = AVR_IO_REGBITS(UCSRC, UCSZ0, 0x3), // 2 bits
+ .ucsz2 = AVR_IO_REGBIT(UCSRB, UCSZ2), // 1 bits
.r_ucsra = UCSRA,
.r_ucsrb = UCSRB,
.wgm_op = {
[0] = AVR_TIMER_WGM_NORMAL8(),
[2] = AVR_TIMER_WGM_CTC(),
- [3] = AVR_TIMER_WGM_FASTPWM(),
- [7] = AVR_TIMER_WGM_FASTPWM(),
+ [3] = AVR_TIMER_WGM_FASTPWM8(),
+ [7] = AVR_TIMER_WGM_OCPWM(),
},
.cs = { AVR_IO_REGBIT(TCCR0B, CS00), AVR_IO_REGBIT(TCCR0B, CS01), AVR_IO_REGBIT(TCCR0B, CS02) },
.cs_div = { 0, 0, 3 /* 8 */, 6 /* 64 */, 8 /* 256 */, 10 /* 1024 */ },
- .r_ocra = OCR0A,
- .r_ocrb = OCR0B,
.r_tcnt = TCNT0,
.overflow = {
.raised = AVR_IO_REGBIT(TIFR, TOV0),
.vector = TIMER0_OVF_vect,
},
- .compa = {
- .enable = AVR_IO_REGBIT(TIMSK, OCIE0A),
- .raised = AVR_IO_REGBIT(TIFR, OCF0A),
- .vector = TIMER0_COMPA_vect,
- },
- .compb = {
- .enable = AVR_IO_REGBIT(TIMSK, OCIE0B),
- .raised = AVR_IO_REGBIT(TIFR, OCF0B),
- .vector = TIMER0_COMPB_vect,
+ .comp = {
+ [AVR_TIMER_COMPA] = {
+ .r_ocr = OCR0A,
+ .com = AVR_IO_REGBITS(TCCR0A, COM0A0, 0x3),
+ .com_pin = AVR_IO_REGBIT(PORTB, 2),
+ .interrupt = {
+ .enable = AVR_IO_REGBIT(TIMSK, OCIE0A),
+ .raised = AVR_IO_REGBIT(TIFR, OCF0A),
+ .vector = TIMER0_COMPA_vect,
+ },
+ },
+ [AVR_TIMER_COMPB] = {
+ .r_ocr = OCR0B,
+ .com = AVR_IO_REGBITS(TCCR0A, COM0B0, 0x3),
+ .com_pin = AVR_IO_REGBIT(PORTD, 5),
+ .interrupt = {
+ .enable = AVR_IO_REGBIT(TIMSK, OCIE0B),
+ .raised = AVR_IO_REGBIT(TIFR, OCF0B),
+ .vector = TIMER0_COMPB_vect,
+ }
+ }
},
},
.timer1 = {
.wgm_op = {
[0] = AVR_TIMER_WGM_NORMAL16(),
[4] = AVR_TIMER_WGM_CTC(),
- [5] = AVR_TIMER_WGM_FASTPWM(),
- [6] = AVR_TIMER_WGM_FASTPWM(),
- [7] = AVR_TIMER_WGM_FASTPWM(),
+ [5] = AVR_TIMER_WGM_FASTPWM8(),
+ [6] = AVR_TIMER_WGM_FASTPWM9(),
+ [7] = AVR_TIMER_WGM_FASTPWM10(),
+ [12] = AVR_TIMER_WGM_ICCTC(),
+ [14] = AVR_TIMER_WGM_ICPWM(),
+ [15] = AVR_TIMER_WGM_OCPWM(),
},
.cs = { AVR_IO_REGBIT(TCCR1B, CS10), AVR_IO_REGBIT(TCCR1B, CS11), AVR_IO_REGBIT(TCCR1B, CS12) },
.cs_div = { 0, 0, 3 /* 8 */, 6 /* 64 */, 8 /* 256 */, 10 /* 1024 */ /* External clock T1 is not handled */},
- .r_ocra = OCR1AL,
- .r_ocrb = OCR1BL,
.r_tcnt = TCNT1L,
-
- .r_ocrah = OCR1AH, // 16 bits timers have two bytes of it
- .r_ocrbh = OCR1BH,
+ .r_icr = ICR1L,
+ .r_icrh = ICR1H,
.r_tcnth = TCNT1H,
+ .ices = AVR_IO_REGBIT(TCCR1B, ICES1),
+ .icp = AVR_IO_REGBIT(PORTD, 6),
+
.overflow = {
.enable = AVR_IO_REGBIT(TIMSK, TOIE1),
.raised = AVR_IO_REGBIT(TIFR, TOV1),
.vector = TIMER1_OVF_vect,
},
- .compa = {
- .enable = AVR_IO_REGBIT(TIMSK, OCIE1A),
- .raised = AVR_IO_REGBIT(TIFR, OCF1A),
- .vector = TIMER1_COMPA_vect,
- },
- .compb = {
- .enable = AVR_IO_REGBIT(TIMSK, OCIE1B),
- .raised = AVR_IO_REGBIT(TIFR, OCF1B),
- .vector = TIMER1_COMPB_vect,
- },
.icr = {
.enable = AVR_IO_REGBIT(TIMSK, ICIE1),
.raised = AVR_IO_REGBIT(TIFR, ICF1),
.vector = TIMER1_CAPT_vect,
},
- },
+ .comp = {
+ [AVR_TIMER_COMPA] = {
+ .r_ocr = OCR1AL,
+ .r_ocrh = OCR1AH, // 16 bits timers have two bytes of it
+ .com = AVR_IO_REGBITS(TCCR1A, COM1A0, 0x3),
+ .com_pin = AVR_IO_REGBIT(PORTB, 3),
+ .interrupt = {
+ .enable = AVR_IO_REGBIT(TIMSK, OCIE1A),
+ .raised = AVR_IO_REGBIT(TIFR, OCF1A),
+ .vector = TIMER1_COMPA_vect,
+ },
+ },
+ [AVR_TIMER_COMPB] = {
+ .r_ocr = OCR1BL,
+ .r_ocrh = OCR1BH,
+ .com = AVR_IO_REGBITS(TCCR1A, COM1A0, 0x3),
+ .com_pin = AVR_IO_REGBIT(PORTB, 4),
+ .interrupt = {
+ .enable = AVR_IO_REGBIT(TIMSK, OCIE1B),
+ .raised = AVR_IO_REGBIT(TIFR, OCF1B),
+ .vector = TIMER1_COMPB_vect,
+ }
+ }
+ }
+ }
};
static avr_t * make()
{
- return &mcu.core;
+ return avr_core_allocate(&mcu.core, sizeof(struct mcu_t));
}
avr_kind_t tiny2313 = {
{
struct mcu_t * mcu = (struct mcu_t*)avr;
- printf("%s init\n", avr->mmcu);
-
avr_eeprom_init(avr, &mcu->eeprom);
+ avr_watchdog_init(avr, &mcu->watchdog);
+ avr_extint_init(avr, &mcu->extint);
+ avr_ioport_init(avr, &mcu->porta);
avr_ioport_init(avr, &mcu->portb);
avr_ioport_init(avr, &mcu->portd);
avr_uart_init(avr, &mcu->uart);
projects / simavr / blobdiff