IOs: Use new IRQ alloc function

[simavr] / simavr / sim / avr_uart.c

diff --git a/simavr/sim/avr_uart.c b/simavr/sim/avr_uart.c
index 235cbe6..3a7c6ae 100644 (file)
--- a/simavr/sim/avr_uart.c
+++ b/simavr/sim/avr_uart.c
@@ -28,13 +28,13 @@
 #include "avr_uart.h"
 #include "sim_hex.h"
 
-DEFINE_FIFO(uint8_t, uart_fifo, 128);
+DEFINE_FIFO(uint8_t, uart_fifo, 64);
 
 static avr_cycle_count_t avr_uart_txc_raise(struct avr_t * avr, avr_cycle_count_t when, void * param)
 {
        avr_uart_t * p = (avr_uart_t *)param;
        if (avr_regbit_get(avr, p->txen)) {
-               // if the interrupts are not used, still raised the UDRE and TXC flaga
+               // if the interrupts are not used, still raised the UDRE and TXC flag
                avr_raise_interrupt(avr, &p->udrc);
                avr_raise_interrupt(avr, &p->txc);
        }
@@ -54,6 +54,7 @@ static uint8_t avr_uart_rxc_read(struct avr_t * avr, avr_io_addr_t addr, void *
        avr_uart_t * p = (avr_uart_t *)param;
        uint8_t v = avr_core_watch_read(avr, addr);
 
+       //static uint8_t old = 0xff; if (v != old) printf("UCSRA read %02x\n", v); old = v;
        //
        // if RX is enabled, and there is nothing to read, and
        // the AVR core is reading this register, it's probably
@@ -80,6 +81,9 @@ static uint8_t avr_uart_read(struct avr_t * avr, avr_io_addr_t addr, void * para
 {
        avr_uart_t * p = (avr_uart_t *)param;
 
+       // clear the rxc bit in case the code is using pooling
+       avr_regbit_clear(avr, p->rxc.raised);
+
        if (!avr_regbit_get(avr, p->rxen)) {
                avr->data[addr] = 0;
                // made to trigger potential watchpoints
@@ -88,6 +92,7 @@ static uint8_t avr_uart_read(struct avr_t * avr, avr_io_addr_t addr, void * para
        }
        uint8_t v = uart_fifo_read(&p->input);
 
+       //printf("UART read %02x %s\n", v, uart_fifo_isempty(&p->input) ? "EMPTY!" : "");
        avr->data[addr] = v;
        // made to trigger potential watchpoints
        v = avr_core_watch_read(avr, addr);
@@ -121,15 +126,17 @@ static void avr_uart_write(struct avr_t * avr, avr_io_addr_t addr, uint8_t v, vo
                avr_regbit_clear(avr, p->udrc.raised);
                avr_cycle_timer_register_usec(avr, 100, avr_uart_txc_raise, p); // should be uart speed dependent
 
-               static char buf[128];
-               static int l = 0;
-               buf[l++] = v < ' ' ? '.' : v;
-               buf[l] = 0;
-               if (v == '\n' || l == 127) {
-                       l = 0;
-                       printf("\e[32m%s\e[0m\n", buf);
+               if (p->flags & AVR_UART_FLAG_STDIO) {
+                       static char buf[128];
+                       static int l = 0;
+                       buf[l++] = v < ' ' ? '.' : v;
+                       buf[l] = 0;
+                       if (v == '\n' || l == 127) {
+                               l = 0;
+                               printf("\e[32m%s\e[0m\n", buf);
+                       }
                }
-//             printf("UDR%c(%02x) = %02x\n", p->name, addr, v);
+       //      printf("UDR%c(%02x) = %02x\n", p->name, addr, v);
                // tell other modules we are "outputing" a byte
                if (avr_regbit_get(avr, p->txen))
                        avr_raise_irq(p->io.irq + UART_IRQ_OUTPUT, v);
@@ -140,11 +147,8 @@ static void avr_uart_write(struct avr_t * avr, avr_io_addr_t addr, uint8_t v, vo
 
                avr_core_watch_write(avr, addr, v);
 
-               // if writing one to a one, clear bit
-               if (udre && avr_regbit_get(avr, p->udrc.raised))
-                       avr_regbit_clear(avr, p->udrc.raised);
-               if (txc && avr_regbit_get(avr, p->txc.raised))
-                       avr_regbit_clear(avr, p->txc.raised);
+               avr_clear_interupt_if(avr, &p->udrc, udre);
+               avr_clear_interupt_if(avr, &p->txc, txc);
        }
 }
 
@@ -161,6 +165,8 @@ static void avr_uart_irq_input(struct avr_irq_t * irq, uint32_t value, void * pa
                avr_cycle_timer_register_usec(avr, 100, avr_uart_rxc_raise, p); // should be uart speed dependent
        uart_fifo_write(&p->input, value); // add to fifo
 
+//     printf("UART IRQ in %02x (%d/%d) %s\n", value, p->input.read, p->input.write, uart_fifo_isfull(&p->input) ? "FULL!!" : "");
+
        if (uart_fifo_isfull(&p->input))
                avr_raise_irq(p->io.irq + UART_IRQ_OUT_XOFF, 1);
 }
@@ -181,9 +187,6 @@ void avr_uart_reset(struct avr_io_t *io)
 
 }
 
-#define AVR_IOCTL_UART_SET_FLAGS(_name)        AVR_IOCTL_DEF('u','a','s',(_name))
-#define AVR_IOCTL_UART_GET_FLAGS(_name)        AVR_IOCTL_DEF('u','a','g',(_name))
-
 static int avr_uart_ioctl(struct avr_io_t * port, uint32_t ctl, void * io_param)
 {
        avr_uart_t * p = (avr_uart_t *)port;
@@ -204,7 +207,6 @@ static int avr_uart_ioctl(struct avr_io_t * port, uint32_t ctl, void * io_param)
        return res;
 }
 
-
 static avr_io_t        _io = {
        .kind = "uart",
        .reset = avr_uart_reset,
@@ -217,18 +219,16 @@ void avr_uart_init(avr_t * avr, avr_uart_t * p)
 
 //     printf("%s UART%c UDR=%02x\n", __FUNCTION__, p->name, p->r_udr);
 
-       // allocate this module's IRQ
-       p->io.irq_count = UART_IRQ_COUNT;
-       p->io.irq = avr_alloc_irq(0, p->io.irq_count);
-       p->io.irq_ioctl_get = AVR_IOCTL_UART_GETIRQ(p->name);
-
-       p->flags = AVR_UART_FLAG_POOL_SLEEP;
+       p->flags = AVR_UART_FLAG_POOL_SLEEP|AVR_UART_FLAG_STDIO;
 
        avr_register_io(avr, &p->io);
        avr_register_vector(avr, &p->rxc);
        avr_register_vector(avr, &p->txc);
        avr_register_vector(avr, &p->udrc);
 
+       // allocate this module's IRQ
+       avr_io_setirqs(&p->io, AVR_IOCTL_UART_GETIRQ(p->name), UART_IRQ_COUNT, NULL);
+
        avr_register_io_write(avr, p->r_udr, avr_uart_write, p);
        avr_register_io_read(avr, p->r_udr, avr_uart_read, p);
        // monitor code that reads the rxc flag, and delay it a bit