cores: Now duplicate the global structure

[simavr] / simavr / sim / sim_avr.h

diff --git a/simavr/sim/sim_avr.h b/simavr/sim/sim_avr.h
index a91c2b9..c9414db 100644 (file)
--- a/simavr/sim/sim_avr.h
+++ b/simavr/sim/sim_avr.h
@@ -27,8 +27,11 @@ extern "C" {
 #endif
 
 #include "sim_irq.h"
+#include "sim_interrupts.h"
 #include "sim_cycle_timers.h"
 
+typedef uint32_t avr_flashaddr_t;
+
 struct avr_t;
 typedef uint8_t (*avr_io_read_t)(
                struct avr_t * avr,
@@ -52,7 +55,7 @@ enum {
        R_SREG  = 32+0x3f,
 
        // maximum number of IO registers, on normal AVRs
-       MAX_IOs = 256 - 32,     // minus 32 GP registers
+       MAX_IOs = 256,  // Bigger AVRs need more than 256-32 (mega1280)
 };
 
 #define AVR_DATA_TO_IO(v) ((v) - 32)
@@ -180,7 +183,7 @@ typedef struct avr_t {
         * this is why you will see >>1 and <<1 in the decoder to handle jumps.
         * It CAN be a little confusing, so concentrate, young grasshopper.
         */
-       uint32_t        pc;
+       avr_flashaddr_t pc;
 
        /*
         * callback when specific IO registers are read/written.
@@ -229,14 +232,10 @@ typedef struct avr_t {
        // queue of io modules
        struct avr_io_t *io_port;
 
+       // cycle timers tracking & delivery
        avr_cycle_timer_pool_t  cycle_timers;
-
-       // interrupt vectors, and their enable/clear registers
-       struct avr_int_vector_t * vector[64];
-       uint8_t         vector_count;
-       uint8_t         pending_wait;   // number of cycles to wait for pending
-       struct avr_int_vector_t * pending[64]; // needs to be >= vectors and a power of two
-       uint8_t         pending_w, pending_r;   // fifo cursors
+       // interrupt vectors and delivery fifo
+       avr_int_table_t interrupts;
 
        // DEBUG ONLY -- value ignored if CONFIG_SIMAVR_TRACE = 0
        int             trace : 1,
@@ -282,6 +281,12 @@ avr_make_mcu_by_name(
 int
 avr_init(
                avr_t * avr);
+// Used by the cores, allocated a mutable avr_t from the const global
+avr_t *
+avr_core_allocate(
+               const avr_t * core,
+               uint32_t coreLen);
+
 // resets the AVR, and the IO modules
 void
 avr_reset(
@@ -315,7 +320,7 @@ avr_loadcode(
                avr_t * avr,
                uint8_t * code,
                uint32_t size,
-               uint32_t address);
+               avr_flashaddr_t address);
 
 /*
  * these are accessors for avr->data but allows watchpoints to be set for gdb
@@ -354,8 +359,6 @@ void avr_callback_run_raw(avr_t * avr);
 
 #include "sim_io.h"
 #include "sim_regbit.h"
-#include "sim_interrupts.h"
-#include "sim_cycle_timers.h"
 
 #endif /*__SIM_AVR_H__*/