X-Git-Url: http://git.rot13.org/?a=blobdiff_plain;ds=sidebyside;f=firmware%2Fapps%2Fchipcon%2Fchipcon.c;h=c226361492c0b49c738208c2d7a2d0bcb2744ec8;hb=e1103a8b77fcaed931a905808f4cb4fe7b6e2194;hp=45a27e7ee81b7e9b548e602b6dc637077c80aaee;hpb=b86fb0f2dec49f42a9c9531f37b29e8815fc1384;p=goodfet

diff --git a/firmware/apps/chipcon/chipcon.c b/firmware/apps/chipcon/chipcon.c
index 45a27e7..c226361 100644
--- a/firmware/apps/chipcon/chipcon.c
+++ b/firmware/apps/chipcon/chipcon.c
@@ -1,17 +1,16 @@
-//GoodFET ChipCon Debugging Application
-//Handles basic I/O for the Chipcon 8051 debugging protocol.
+/*! \file chipcon.c
+  \author Travis Goodspeed
+  \brief Chipcon 8051 debugging.
+*/
 
-//Higher level left to client application.
 
 //This is like SPI, except that you read or write, not both.
 
-/** N.B. The READ verb performs a write of all (any) supplied data,
+/* N.B. The READ verb performs a write of all (any) supplied data,
     then reads a single byte reply from the target.  The WRITE verb
     only writes.
 */
 
-//This is REALLY untested.
-
 #include "platform.h"
 #include "command.h"
 #include "chipcon.h"
@@ -21,7 +20,7 @@
 #include <iomacros.h>
 
 
-/** Concerning clock rates,
+/* Concerning clock rates,
     the maximimum clock rates are defined on page 4 of the spec.
     They vary, but are roughly 30MHz.  Raising this clock rate might
     allow for clock glitching, but the GoodFET isn't sufficient fast for that.
@@ -37,7 +36,7 @@
 
 //This could be more accurate.
 //Does it ever need to be?
-#define CCSPEED 0
+#define CCSPEED 3
 #define CCDELAY(x) delay(x)
 
 #define SETMOSI P5OUT|=MOSI
@@ -125,9 +124,9 @@ void ccread(unsigned char len){
 //! Handles a monitor command.
 void cchandle(unsigned char app,
 	       unsigned char verb,
-	       unsigned char len){
+	       unsigned long len){
   switch(verb){
-    //PEEK and POKE will come later.
+    //CC_PEEK and CC_POKE will come later.
   case READ:  //Write a command and return 1-byte reply.
     cccmd(len);
     ccread(1);
@@ -205,15 +204,15 @@ void cchandle(unsigned char app,
 
   //Macro commands
   case CC_READ_CODE_MEMORY:
-    cmddata[0]=peekcodebyte(cmddataword[0]);
+    cmddata[0]=cc_peekcodebyte(cmddataword[0]);
     txdata(app,verb,1);
     break;
   case CC_READ_XDATA_MEMORY:
-    cmddata[0]=peekdatabyte(cmddataword[0]);
+    cmddata[0]=cc_peekdatabyte(cmddataword[0]);
     txdata(app,verb,1);
     break;
   case CC_WRITE_XDATA_MEMORY:
-    cmddata[0]=pokedatabyte(cmddataword[0], cmddata[2]);
+    cmddata[0]=cc_pokedatabyte(cmddataword[0], cmddata[2]);
     txdata(app,verb,1);
     break;
   case CC_SET_PC:
@@ -281,7 +280,6 @@ unsigned short cc_get_pc(){
   return cmddataword[0];
 }
 
-
 //! Set a hardware breakpoint.
 void cc_set_hw_brkpnt(unsigned short adr){
   cmddataword[0]=adr;
@@ -333,6 +331,7 @@ unsigned char cc_debug(unsigned char len,
 	      unsigned char c){
   unsigned char cmd=0x54+(len&0x3);//(len&0x3);
   CCWRITE;
+  cctrans8(0xFF);//resync
   cctrans8(cmd);
   if(len--)
     cctrans8(a);
@@ -345,7 +344,7 @@ unsigned char cc_debug(unsigned char len,
 }
 
 //! Fetch a byte of code memory.
-unsigned char peekcodebyte(unsigned long adr){
+unsigned char cc_peekcodebyte(unsigned long adr){
   /** See page 9 of SWRA124 */
   unsigned char bank=adr>>15,
     lb=adr&0xFF,
@@ -362,7 +361,7 @@ unsigned char peekcodebyte(unsigned long adr){
   //CLR A
   cc_debug(2, 0xE4, 0, 0);
   //MOVC A, @A+DPTR;
-  toret=cc_debug(1, 0x93, 0, 0);
+  toret=cc_debug(3, 0x93, 0, 0);
   //INC DPTR
   //cc_debug(1, 0xA3, 0, 0);
   
@@ -371,7 +370,7 @@ unsigned char peekcodebyte(unsigned long adr){
 
 
 //! Set a byte of data memory.
-unsigned char pokedatabyte(unsigned int adr,
+unsigned char cc_pokedatabyte(unsigned int adr,
 			   unsigned char val){
   unsigned char
     hb=(adr&0xFF00)>>8,
@@ -396,7 +395,7 @@ for (n = 0; n < count; n++) {
 }
 
 //! Fetch a byte of data memory.
-unsigned char peekdatabyte(unsigned int adr){
+unsigned char cc_peekdatabyte(unsigned int adr){
   unsigned char
     hb=(adr&0xFF00)>>8,
     lb=adr&0xFF,