X-Git-Url: http://git.rot13.org/?a=blobdiff_plain;f=arch%2Fppc%2Fsyslib%2Fmpc85xx_devices.c;h=7735336f5b8f51b758587053736c0f18ffad9ae9;hb=b4d8d1a93c6ea042b29bb66fbb1cf6bc556c18f7;hp=bbc5ac0de87835f7251fc0980f89166efb2fc6cc;hpb=486a153f0e294f7cc735838edcb6b32e623cbe52;p=powerpc.git

diff --git a/arch/ppc/syslib/mpc85xx_devices.c b/arch/ppc/syslib/mpc85xx_devices.c
index bbc5ac0de8..7735336f5b 100644
--- a/arch/ppc/syslib/mpc85xx_devices.c
+++ b/arch/ppc/syslib/mpc85xx_devices.c
@@ -1,9 +1,7 @@
 /*
- * arch/ppc/platforms/85xx/mpc85xx_devices.c
- *
  * MPC85xx Device descriptions
  *
- * Maintainer: Kumar Gala <kumar.gala@freescale.com>
+ * Maintainer: Kumar Gala <galak@kernel.crashing.org>
  *
  * Copyright 2005 Freescale Semiconductor Inc.
  *
@@ -25,19 +23,19 @@
 /* We use offsets for IORESOURCE_MEM since we do not know at compile time
  * what CCSRBAR is, will get fixed up by mach_mpc85xx_fixup
  */
+struct gianfar_mdio_data mpc85xx_mdio_pdata = {
+};
 
 static struct gianfar_platform_data mpc85xx_tsec1_pdata = {
 	.device_flags = FSL_GIANFAR_DEV_HAS_GIGABIT |
 	    FSL_GIANFAR_DEV_HAS_COALESCE | FSL_GIANFAR_DEV_HAS_RMON |
 	    FSL_GIANFAR_DEV_HAS_MULTI_INTR,
-	.phy_reg_addr = MPC85xx_ENET1_OFFSET,
 };
 
 static struct gianfar_platform_data mpc85xx_tsec2_pdata = {
 	.device_flags = FSL_GIANFAR_DEV_HAS_GIGABIT |
 	    FSL_GIANFAR_DEV_HAS_COALESCE | FSL_GIANFAR_DEV_HAS_RMON |
 	    FSL_GIANFAR_DEV_HAS_MULTI_INTR,
-	.phy_reg_addr = MPC85xx_ENET1_OFFSET,
 };
 
 static struct gianfar_platform_data mpc85xx_etsec1_pdata = {
@@ -46,7 +44,6 @@ static struct gianfar_platform_data mpc85xx_etsec1_pdata = {
 	    FSL_GIANFAR_DEV_HAS_MULTI_INTR |
 	    FSL_GIANFAR_DEV_HAS_CSUM | FSL_GIANFAR_DEV_HAS_VLAN |
 	    FSL_GIANFAR_DEV_HAS_EXTENDED_HASH,
-	.phy_reg_addr = MPC85xx_ENET1_OFFSET,
 };
 
 static struct gianfar_platform_data mpc85xx_etsec2_pdata = {
@@ -55,7 +52,6 @@ static struct gianfar_platform_data mpc85xx_etsec2_pdata = {
 	    FSL_GIANFAR_DEV_HAS_MULTI_INTR |
 	    FSL_GIANFAR_DEV_HAS_CSUM | FSL_GIANFAR_DEV_HAS_VLAN |
 	    FSL_GIANFAR_DEV_HAS_EXTENDED_HASH,
-	.phy_reg_addr = MPC85xx_ENET1_OFFSET,
 };
 
 static struct gianfar_platform_data mpc85xx_etsec3_pdata = {
@@ -64,7 +60,6 @@ static struct gianfar_platform_data mpc85xx_etsec3_pdata = {
 	    FSL_GIANFAR_DEV_HAS_MULTI_INTR |
 	    FSL_GIANFAR_DEV_HAS_CSUM | FSL_GIANFAR_DEV_HAS_VLAN |
 	    FSL_GIANFAR_DEV_HAS_EXTENDED_HASH,
-	.phy_reg_addr = MPC85xx_ENET1_OFFSET,
 };
 
 static struct gianfar_platform_data mpc85xx_etsec4_pdata = {
@@ -73,11 +68,10 @@ static struct gianfar_platform_data mpc85xx_etsec4_pdata = {
 	    FSL_GIANFAR_DEV_HAS_MULTI_INTR |
 	    FSL_GIANFAR_DEV_HAS_CSUM | FSL_GIANFAR_DEV_HAS_VLAN |
 	    FSL_GIANFAR_DEV_HAS_EXTENDED_HASH,
-	.phy_reg_addr = MPC85xx_ENET1_OFFSET,
 };
 
 static struct gianfar_platform_data mpc85xx_fec_pdata = {
-	.phy_reg_addr = MPC85xx_ENET1_OFFSET,
+	.device_flags = 0,
 };
 
 static struct fsl_i2c_platform_data mpc85xx_fsl_i2c_pdata = {
@@ -719,6 +713,19 @@ struct platform_device ppc_sys_platform_devices[] = {
 			},
 		},
 	},
+	[MPC85xx_MDIO] = {
+		.name = "fsl-gianfar_mdio",
+		.id = 0,
+		.dev.platform_data = &mpc85xx_mdio_pdata,
+		.num_resources = 1,
+		.resource = (struct resource[]) {
+			{
+				.start	= 0x24520,
+				.end	= 0x2453f,
+				.flags	= IORESOURCE_MEM,
+			},
+		},
+	},
 };
 
 static int __init mach_mpc85xx_fixup(struct platform_device *pdev)