X-Git-Url: http://git.rot13.org/?a=blobdiff_plain;f=firmware%2Fapps%2Fjtag%2Fjtag430.c;h=20055f20d5fc246dfeae7763bb93163b8d29d890;hb=80cbeb3628a63704eed9244ee3d6172182dc106f;hp=0d1fbfb7791e38bfd9d688b17ab4ea80d441df3e;hpb=6dc88d2f1713d2bf9f2fabb5fbfb9f235a679b2f;p=goodfet diff --git a/firmware/apps/jtag/jtag430.c b/firmware/apps/jtag/jtag430.c index 0d1fbfb..20055f2 100644 --- a/firmware/apps/jtag/jtag430.c +++ b/firmware/apps/jtag/jtag430.c @@ -10,23 +10,31 @@ unsigned int jtag430mode=MSP430X2MODE; -//! Set the program counter. -void jtag430_setpc(unsigned int adr){ +//! Set a register. +void jtag430_setr(u8 reg, u16 val){ jtag_ir_shift8(IR_CNTRL_SIG_16BIT); jtag_dr_shift16(0x3401);// release low byte jtag_ir_shift8(IR_DATA_16BIT); - jtag_dr_shift16(0x4030);//Instruction to load PC + + //0x4030 is "MOV #foo, r0" + //Right-most field is register, so 0x4035 loads r5 + jtag_dr_shift16(0x4030+reg); CLRTCLK; SETTCLK; - jtag_dr_shift16(adr);// Value for PC + jtag_dr_shift16(val);// Value for the register CLRTCLK; jtag_ir_shift8(IR_ADDR_CAPTURE); SETTCLK; - CLRTCLK ;// Now PC is set to "PC_Value" + CLRTCLK ;// Now reg is set to new value. jtag_ir_shift8(IR_CNTRL_SIG_16BIT); jtag_dr_shift16(0x2401);// low byte controlled by JTAG } +//! Set the program counter. +void jtag430_setpc(unsigned int adr){ + jtag430_setr(0,adr); +} + //! Halt the CPU void jtag430_haltcpu(){ //jtag430_setinstrfetch(); @@ -62,7 +70,7 @@ unsigned int jtag430_readmem(unsigned int adr){ else jtag_dr_shift16(0x2419);//byte read jtag_ir_shift8(IR_ADDR_16BIT); - jtag_dr_shift16(adr);//address + jtag_dr_shiftadr(adr);//address jtag_ir_shift8(IR_DATA_TO_ADDR); SETTCLK; @@ -81,7 +89,7 @@ void jtag430_writemem(unsigned int adr, unsigned int data){ else jtag_dr_shift16(0x2418);//byte write jtag_ir_shift8(IR_ADDR_16BIT); - jtag_dr_shift16(adr); + jtag_dr_shiftadr(adr); jtag_ir_shift8(IR_DATA_TO_ADDR); jtag_dr_shift16(data); SETTCLK; @@ -94,7 +102,7 @@ void jtag430_writeflashword(unsigned int adr, unsigned int data){ jtag_ir_shift8(IR_CNTRL_SIG_16BIT); jtag_dr_shift16(0x2408);//word write jtag_ir_shift8(IR_ADDR_16BIT); - jtag_dr_shift16(adr); + jtag_dr_shiftadr(adr); jtag_ir_shift8(IR_DATA_TO_ADDR); jtag_dr_shift16(data); SETTCLK; @@ -199,19 +207,17 @@ void jtag430_resettap(){ SETTDI; //430X2 SETTMS; //SETTDI; //classic - SETTCK; + TCKTOCK; // Navigate to reset state. // Should be at least six. for(i=0;i<4;i++){ - CLRTCK; - SETTCK; + TCKTOCK; } // test-logic-reset - CLRTCK; CLRTMS; - SETTCK; + TCKTOCK; SETTMS; // idle @@ -238,7 +244,9 @@ void jtag430_start(){ SETTST; SETRST; delay(0xFFFF); - + + + #ifndef SBWREWRITE //Entry sequence from Page 67 of SLAU265A for 4-wire MSP430 JTAG CLRRST; delay(100); //100 @@ -249,6 +257,7 @@ void jtag430_start(){ SETRST; P5DIR&=~RST; delay(0xFFFF); + #endif //Perform a reset and disable watchdog. jtag430_por(); @@ -257,6 +266,27 @@ void jtag430_start(){ jtag430_haltcpu(); } +//! Stop JTAG. +void jtag430_stop(){ + debugstr("Exiting JTAG."); + jtagsetup(); + + //Known-good starting position. + //Might be unnecessary. + //SETTST; + CLRTST; + SETRST; + delay(0xFFFF); + + //Entry sequence from Page 67 of SLAU265A for 4-wire MSP430 JTAG + CLRRST; + delay(0xFFFF); + SETRST; + //P5DIR&=~RST; + //delay(0xFFFF); + +} + //! Set CPU to Instruction Fetch void jtag430_setinstrfetch(){ @@ -281,6 +311,20 @@ void jtag430handle(unsigned char app, //debugstr("Classic MSP430 handler."); + + /* FIXME + * Sometimes JTAG doesn't init correctly. + * This restarts the connection if the masked-rom + * chip ID cannot be read. Should print warning + * for testing server. + */ + while((i=jtag430_readmem(0xff0))==0xFFFF){ + jtag430_start(); + P1OUT^=1; + } + P1OUT&=~1; + + switch(verb){ case START: //Enter JTAG mode. @@ -288,6 +332,12 @@ void jtag430handle(unsigned char app, //TAP setup, fuse check jtag430_resettap(); + cmddata[0]=jtag_ir_shift8(IR_BYPASS); + txdata(app,verb,1); + + break; + case STOP: + jtag430_stop(); txdata(app,verb,0); break; case JTAG430_HALTCPU: @@ -313,7 +363,7 @@ void jtag430handle(unsigned char app, len=(cmddataword[2]);//always even. else len=2; - len&=~1;//clue lsbit + len&=~1;//clear lsbit txhead(app,verb,len); for(i=0;i>1)-2;i++){ + //debugstr("Poking flash memory."); + jtag430_writeflash(at+(i<<1),cmddataword[i+2]); + //Reflash if needed. Try this twice to save grace? + if(cmddataword[i]!=jtag430_readmem(at)) + jtag430_writeflash(at+(i<<1),cmddataword[i+2]); + } + + //Return result of first write as a word. + cmddataword[0]=jtag430_readmem(cmddataword[0]); + txdata(app,verb,2); break; case JTAG430_ERASEFLASH: @@ -354,7 +422,16 @@ void jtag430handle(unsigned char app, jtag430_setpc(cmddataword[0]); txdata(app,verb,0); break; - + case JTAG430_SETREG: + jtag430_setr(cmddata[0],cmddataword[1]); + txdata(app,verb,0); + break; + case JTAG430_GETREG: + //jtag430_getr(cmddata[0]); + debugstr("JTAG430_GETREG not yet implemented."); + cmddataword[0]=0xDEAD; + txdata(app,verb,2); + break; case JTAG430_COREIP_ID: case JTAG430_DEVICE_ID: cmddataword[0]=0;