X-Git-Url: http://git.rot13.org/?a=blobdiff_plain;f=firmware%2Fapps%2Fjtag%2Fjtag430.c;h=20055f20d5fc246dfeae7763bb93163b8d29d890;hb=93abf8b177c06d34457856d7a8b53720e5cb3414;hp=7bfcba6e776c9c1036fe52742f8d799582039a28;hpb=d7ad826230d336ad7b7bd20e47dccc26d7ad456f;p=goodfet

diff --git a/firmware/apps/jtag/jtag430.c b/firmware/apps/jtag/jtag430.c
index 7bfcba6..20055f2 100644
--- a/firmware/apps/jtag/jtag430.c
+++ b/firmware/apps/jtag/jtag430.c
@@ -10,23 +10,31 @@
 
 unsigned int jtag430mode=MSP430X2MODE;
 
-//! Set the program counter.
-void jtag430_setpc(unsigned int adr){
+//! Set a register.
+void jtag430_setr(u8 reg, u16 val){
   jtag_ir_shift8(IR_CNTRL_SIG_16BIT);
   jtag_dr_shift16(0x3401);// release low byte
   jtag_ir_shift8(IR_DATA_16BIT);
-  jtag_dr_shift16(0x4030);//Instruction to load PC
+  
+  //0x4030 is "MOV #foo, r0"
+  //Right-most field is register, so 0x4035 loads r5
+  jtag_dr_shift16(0x4030+reg);
   CLRTCLK;
   SETTCLK;
-  jtag_dr_shift16(adr);// Value for PC
+  jtag_dr_shift16(val);// Value for the register
   CLRTCLK;
   jtag_ir_shift8(IR_ADDR_CAPTURE);
   SETTCLK;
-  CLRTCLK ;// Now PC is set to "PC_Value"
+  CLRTCLK ;// Now reg is set to new value.
   jtag_ir_shift8(IR_CNTRL_SIG_16BIT);
   jtag_dr_shift16(0x2401);// low byte controlled by JTAG
 }
 
+//! Set the program counter.
+void jtag430_setpc(unsigned int adr){
+  jtag430_setr(0,adr);
+}
+
 //! Halt the CPU
 void jtag430_haltcpu(){
   //jtag430_setinstrfetch();
@@ -62,7 +70,7 @@ unsigned int jtag430_readmem(unsigned int adr){
   else
     jtag_dr_shift16(0x2419);//byte read
   jtag_ir_shift8(IR_ADDR_16BIT);
-  jtag_dr_shift16(adr);//address
+  jtag_dr_shiftadr(adr);//address
   jtag_ir_shift8(IR_DATA_TO_ADDR);
   SETTCLK;
 
@@ -81,7 +89,7 @@ void jtag430_writemem(unsigned int adr, unsigned int data){
   else
     jtag_dr_shift16(0x2418);//byte write
   jtag_ir_shift8(IR_ADDR_16BIT);
-  jtag_dr_shift16(adr);
+  jtag_dr_shiftadr(adr);
   jtag_ir_shift8(IR_DATA_TO_ADDR);
   jtag_dr_shift16(data);
   SETTCLK;
@@ -94,7 +102,7 @@ void jtag430_writeflashword(unsigned int adr, unsigned int data){
   jtag_ir_shift8(IR_CNTRL_SIG_16BIT);
   jtag_dr_shift16(0x2408);//word write
   jtag_ir_shift8(IR_ADDR_16BIT);
-  jtag_dr_shift16(adr);
+  jtag_dr_shiftadr(adr);
   jtag_ir_shift8(IR_DATA_TO_ADDR);
   jtag_dr_shift16(data);
   SETTCLK;
@@ -199,19 +207,17 @@ void jtag430_resettap(){
   SETTDI; //430X2
   SETTMS;
   //SETTDI; //classic
-  SETTCK;
+  TCKTOCK;
 
   // Navigate to reset state.
   // Should be at least six.
   for(i=0;i<4;i++){
-    CLRTCK;
-    SETTCK;
+    TCKTOCK;
   }
 
   // test-logic-reset
-  CLRTCK;
   CLRTMS;
-  SETTCK;
+  TCKTOCK;
   SETTMS;
   // idle
 
@@ -239,6 +245,7 @@ void jtag430_start(){
   SETRST;
   delay(0xFFFF);
 
+
   #ifndef SBWREWRITE
   //Entry sequence from Page 67 of SLAU265A for 4-wire MSP430 JTAG
   CLRRST;
@@ -259,7 +266,7 @@ void jtag430_start(){
   jtag430_haltcpu();
 }
 
-//! Start normally, not JTAG.
+//! Stop JTAG.
 void jtag430_stop(){
   debugstr("Exiting JTAG.");
   jtagsetup();
@@ -316,7 +323,8 @@ void jtag430handle(unsigned char app,
     P1OUT^=1;
   }
   P1OUT&=~1;
-    
+  
+  
   switch(verb){
   case START:
     //Enter JTAG mode.
@@ -414,7 +422,16 @@ void jtag430handle(unsigned char app,
     jtag430_setpc(cmddataword[0]);
     txdata(app,verb,0);
     break;
-    
+  case JTAG430_SETREG:
+    jtag430_setr(cmddata[0],cmddataword[1]);
+    txdata(app,verb,0);
+    break;
+  case JTAG430_GETREG:
+    //jtag430_getr(cmddata[0]);
+    debugstr("JTAG430_GETREG not yet implemented.");
+    cmddataword[0]=0xDEAD;
+    txdata(app,verb,2);
+    break;
   case JTAG430_COREIP_ID:
   case JTAG430_DEVICE_ID:
     cmddataword[0]=0;