X-Git-Url: http://git.rot13.org/?a=blobdiff_plain;f=firmware%2Fapps%2Fspi%2Fspi.c;h=aa3c5ecff4154876534705e2f2fffbea56fdfc9a;hb=022d9128fe8a5783e3b804581fe7996d17095ef6;hp=dc18aff6727929f818ef667ff60e2b65726ddd4f;hpb=425aee0bb66ba9994516fdf6c2f9e6914e9564af;p=goodfet diff --git a/firmware/apps/spi/spi.c b/firmware/apps/spi/spi.c index dc18aff..aa3c5ec 100644 --- a/firmware/apps/spi/spi.c +++ b/firmware/apps/spi/spi.c @@ -14,6 +14,28 @@ #include "spi.h" +//! Handles a monitor command. +void spi_handle_fn( uint8_t const app, + uint8_t const verb, + uint32_t const len); + +// define the spi app's app_t +app_t const spi_app = { + + /* app number */ + SPI, + + /* handle fn */ + spi_handle_fn, + + /* name */ + "SPI", + + /* desc */ + "\tThe SPI app handles the SPI bus protocol, turning\n" + "\tyour GoodFET into a USB-to-SPI adapter.\n" +}; + //This could be more accurate. //Does it ever need to be? #define SPISPEED 0 @@ -23,15 +45,14 @@ //! Set up the pins for SPI mode. void spisetup(){ SETSS; - P5DIR|=MOSI+SCK+BIT0; //BIT0 might be SS - P5DIR&=~MISO; + SPIDIR|=MOSI+SCK+BIT0; //BIT0 might be SS + SPIDIR&=~MISO; DIRSS; //Begin a new transaction. CLRSS; SETSS; - } @@ -243,7 +264,7 @@ void spi_rw_em260(u8 app, u8 verb, u32 len){ P4DIR=0; //TODO ASAP remove P4 references. P4OUT=0xFF; - P4REN=0xFF; + //P4REN=0xFF; //See GoodFETEM260.py for details. //The EM260 requires that the host wait for the client. @@ -255,7 +276,6 @@ void spi_rw_em260(u8 app, u8 verb, u32 len){ em260_wake(); - em260woken: SETMOSI; //Autodetected SPI mode. CLRSS; //Drop !SS to begin transaction. @@ -300,73 +320,68 @@ void spi_rw_em260(u8 app, u8 verb, u32 len){ } //! Handles a monitor command. -void spihandle(unsigned char app, - unsigned char verb, - unsigned long len){ - unsigned long i; - - - //Raise !SS to end transaction, just in case we forgot. - SETSS; - //spisetup(); - - switch(verb){ - //PEEK and POKE might come later. - case READ: - case WRITE: - CLRSS; //Drop !SS to begin transaction. - for(i=0;i