X-Git-Url: http://git.rot13.org/?a=blobdiff_plain;f=firmware%2Finclude%2Fjtagarm7.h;h=40338bf69823658526346e912acc73253f8eb379;hb=cd34fb40f79423b3aef65291d6b970a06b13d2f4;hp=38555b865aeb7c82b9c2fe0df84001a5357b009e;hpb=65c39b80a197663ed494ea6887159b0efe7116a1;p=goodfet diff --git a/firmware/include/jtagarm7.h b/firmware/include/jtagarm7.h index 38555b8..40338bf 100644 --- a/firmware/include/jtagarm7.h +++ b/firmware/include/jtagarm7.h @@ -2,17 +2,33 @@ \brief JTAG handler functions for the ARM7TDMI family of processors */ -#include "jtag.h" +#ifndef JTAGARM7_H +#define JTAGARM7_H +#include "app.h" + +#define JTAGARM7 0x13 #define JTAGSTATE_ARM 0 // bit 4 on dbg status reg is low #define JTAGSTATE_THUMB 1 -unsigned char current_chain; -unsigned char current_dbgstate = -1; -//unsigned char last_halt_debug_state = -1; -//unsigned long last_halt_pc = -1; - +// JTAG TAP states +#define Exit2_DR 0x0 +#define Exit_DR 0x1 +#define Shift_DR 0x2 +#define Pause_DR 0x3 +#define Select_IR 0x4 +#define Update_DR 0x5 +#define Capture_DR 0x6 +#define Select_DR 0x7 +#define Exit2_IR 0x8 +#define Exit_IR 0x9 +#define Shift_IR 0xa +#define Pause_IR 0xb +#define RunTest_Idle 0xc +#define Update_IR 0xd +#define Capture_IR 0xe +#define Test_Reset 0xf // JTAGARM7 Commands @@ -86,9 +102,9 @@ The least significant bit of the instruction register is scanned in and scanned //JTAGARM7TDMI commands -#define JTAGARM7_GET_REGISTER 0x87 -#define JTAGARM7_SET_REGISTER 0x88 -#define JTAGARM7_DEBUG_INSTR 0x89 +#define JTAGARM7_GET_REGISTER 0x8d +#define JTAGARM7_SET_REGISTER 0x8e +#define JTAGARM7_DEBUG_INSTR 0x8f // Really ARM specific stuff #define JTAGARM7_SET_IR 0x90 #define JTAGARM7_WAIT_DBG 0x91 @@ -141,3 +157,7 @@ The least significant bit of the instruction register is scanned in and scanned #define JTAG_ARM7TDMI_DBG_cgenL 8 #define JTAG_ARM7TDMI_DBG_TBIT 16 +extern app_t const jtagarm7_app; + +#endif // JTAGARM7_H +