X-Git-Url: http://git.rot13.org/?a=blobdiff_plain;f=include%2Fasm-sparc%2Fsystem.h;h=58dd162927bbdd076ff1f6c11a80fadcdb68b324;hb=7b7e394185014e0f3bd8989cac937003f20ef9ce;hp=1f6b71f9e1b637f9c773e26db22dbc26e690402d;hpb=312f5726055534be1dc9dd369be13aabd2943fcb;p=powerpc.git

diff --git a/include/asm-sparc/system.h b/include/asm-sparc/system.h
index 1f6b71f9e1..58dd162927 100644
--- a/include/asm-sparc/system.h
+++ b/include/asm-sparc/system.h
@@ -155,7 +155,7 @@ extern void fpsave(unsigned long *fpregs, unsigned long *fsr,
 	"here:\n"									\
         : "=&r" (last)									\
         : "r" (&(current_set[hard_smp_processor_id()])),	\
-	  "r" ((next)->thread_info),				\
+	  "r" (task_thread_info(next)),				\
 	  "i" (TI_KPSR),					\
 	  "i" (TI_KSP),						\
 	  "i" (TI_TASK)						\
@@ -165,6 +165,16 @@ extern void fpsave(unsigned long *fpregs, unsigned long *fsr,
 	  "o0", "o1", "o2", "o3",                   "o7");	\
 	} while(0)
 
+/*
+ * On SMP systems, when the scheduler does migration-cost autodetection,
+ * it needs a way to flush as much of the CPU's caches as possible.
+ *
+ * TODO: fill this in!
+ */
+static inline void sched_cacheflush(void)
+{
+}
+
 /*
  * Changing the IRQ level on the Sparc.
  */