X-Git-Url: http://git.rot13.org/?a=blobdiff_plain;f=include%2Fasm-x86%2Ftsc.h;h=7d3e27f7d484d8ce848951b4f0b48a4d285242c0;hb=6232665040f9a23fafd9d94d4ae8d5a2dc850f65;hp=a4d806610b7ff5c56dc51a628ca8f20ad73d1c89;hpb=92633b72d18ca4f25de1f28e436a882159491e7e;p=powerpc.git diff --git a/include/asm-x86/tsc.h b/include/asm-x86/tsc.h index a4d806610b..7d3e27f7d4 100644 --- a/include/asm-x86/tsc.h +++ b/include/asm-x86/tsc.h @@ -1,13 +1,14 @@ /* - * linux/include/asm-i386/tsc.h - * - * i386 TSC related functions + * x86 TSC related functions */ -#ifndef _ASM_i386_TSC_H -#define _ASM_i386_TSC_H +#ifndef _ASM_X86_TSC_H +#define _ASM_X86_TSC_H #include +#define NS_SCALE 10 /* 2^10, carefully chosen */ +#define US_SCALE 32 /* 2^32, arbitralrily chosen */ + /* * Standard way to access the cycle counter. */ @@ -16,6 +17,8 @@ typedef unsigned long long cycles_t; extern unsigned int cpu_khz; extern unsigned int tsc_khz; +extern void disable_TSC(void); + static inline cycles_t get_cycles(void) { unsigned long long ret = 0; @@ -24,39 +27,22 @@ static inline cycles_t get_cycles(void) if (!cpu_has_tsc) return 0; #endif - -#if defined(CONFIG_X86_GENERIC) || defined(CONFIG_X86_TSC) rdtscll(ret); -#endif + return ret; } -/* Like get_cycles, but make sure the CPU is synchronized. */ -static __always_inline cycles_t get_cycles_sync(void) +static inline cycles_t vget_cycles(void) { - unsigned long long ret; - unsigned eax, edx; - - /* - * Use RDTSCP if possible; it is guaranteed to be synchronous - * and doesn't cause a VMEXIT on Hypervisors - */ - alternative_io(ASM_NOP3, ".byte 0x0f,0x01,0xf9", X86_FEATURE_RDTSCP, - ASM_OUTPUT2("=a" (eax), "=d" (edx)), - "a" (0U), "d" (0U) : "ecx", "memory"); - ret = (((unsigned long long)edx) << 32) | ((unsigned long long)eax); - if (ret) - return ret; - /* - * Don't do an additional sync on CPUs where we know - * RDTSC is already synchronous: + * We only do VDSOs on TSC capable CPUs, so this shouldnt + * access boot_cpu_data (which is not VDSO-safe): */ - alternative_io("cpuid", ASM_NOP2, X86_FEATURE_SYNC_RDTSC, - "=a" (eax), "0" (1) : "ebx","ecx","edx","memory"); - rdtscll(ret); - - return ret; +#ifndef CONFIG_X86_TSC + if (!cpu_has_tsc) + return 0; +#endif + return (cycles_t) __native_read_tsc(); } extern void tsc_init(void); @@ -72,4 +58,7 @@ int check_tsc_unstable(void); extern void check_tsc_sync_source(int cpu); extern void check_tsc_sync_target(void); +extern void tsc_calibrate(void); +extern int notsc_setup(char *); + #endif