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[POWERPC] Fix the UCC rx/tx clock of QE
authorLiu Dave-r63238 <DaveLiu@freescale.com>
Wed, 18 Oct 2006 08:36:56 +0000 (16:36 +0800)
committerPaul Mackerras <paulus@samba.org>
Wed, 25 Oct 2006 03:49:22 +0000 (13:49 +1000)
commitf84c39da766b4c8f13872282f58286a57ad05b3e
tree22241d3e48d2d765b7f6c92467956e6d0cb1763dtree | snapshot
parentb910ecf6bf221bb06f37e44765307c42b20db205commit | diff
[POWERPC] Fix the UCC rx/tx clock of QE

MPC8323EMDS board ethernet interface with RMII uses the CLK16 divisor
for the rx and tx clock, but the ucc_set_qe_mux_rxtx() function doesn't
handle the CLK16 setting of the CMXUCR3 and CMXUCR4 registers.  This
fixes it.

Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
arch/powerpc/sysdev/qe_lib/ucc.c diff | blob | history
DSM-G600 Linux 2.6