ARM: tegra: Switch CPU to PLLP on resume from LP1 on Tegra30

The early-resume code shall not switch CPU to PLLX because PLLX
configuration could be unstable or PLLX could be even disabled if
CPU entered suspend on PLLP, it the case if CPUFREQ driver is active.
The actual PLLX configuration and burst policy shall be restored by
the clock driver.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>

diff --git a/arch/arm/mach-tegra/sleep-tegra30.S b/arch/arm/mach-tegra/sleep-tegra30.S
index c1ac065..828f6c3 100644 (file)
--- a/arch/arm/mach-tegra/sleep-tegra30.S
+++ b/arch/arm/mach-tegra/sleep-tegra30.S
@@ -397,8 +397,8 @@ _pll_m_c_x_done:
        str     r4, [r0, #CLK_RESET_SCLK_BURST]
 
        cmp     r10, #TEGRA30
-       movweq  r4, #:lower16:((1 << 28) | (0x8))       @ burst policy is PLLX
-       movteq  r4, #:upper16:((1 << 28) | (0x8))
+       movweq  r4, #:lower16:((1 << 28) | (0x4))       @ burst policy is PLLP
+       movteq  r4, #:upper16:((1 << 28) | (0x4))
        movwne  r4, #:lower16:((1 << 28) | (0xe))
        movtne  r4, #:upper16:((1 << 28) | (0xe))
        str     r4, [r0, #CLK_RESET_CCLK_BURST]