cores: Updated comparators

Also filled up the ones for tinyx5, megax4, tiny2313

Signed-off-by: Michel Pollet <buserror@gmail.com>

diff --git a/simavr/cores/sim_mega128.c b/simavr/cores/sim_mega128.c
index 7c0bf50..18a8cdf 100644 (file)
--- a/simavr/cores/sim_mega128.c
+++ b/simavr/cores/sim_mega128.c
@@ -209,7 +209,7 @@ struct mcu_t {
                .comp = {
                        [AVR_TIMER_COMPA] = {
                                .r_ocr = OCR0,
-                               .com = { AVR_IO_REGBIT(TCCR0, COM00), AVR_IO_REGBIT(TCCR0, COM01) },
+                               .com = AVR_IO_REGBITS(TCCR0, COM00, 0x3),
                                .com_pin = AVR_IO_REGBIT(PORTB, PB4),
                                .interrupt = {
                                        .enable = AVR_IO_REGBIT(TIMSK, OCIE0),
@@ -259,7 +259,7 @@ struct mcu_t {
                        [AVR_TIMER_COMPA] = {
                                .r_ocr = OCR1AL,
                                .r_ocrh = OCR1AH,       // 16 bits timers have two bytes of it
-                               .com = { AVR_IO_REGBIT(TCCR1A, COM1A0), AVR_IO_REGBIT(TCCR1A, COM1A1) },
+                               .com = AVR_IO_REGBITS(TCCR1A, COM1A0, 0x3),
                                .com_pin = AVR_IO_REGBIT(PORTB, PB5),
                                .interrupt = {
                                        .enable = AVR_IO_REGBIT(TIMSK, OCIE1A),
@@ -270,7 +270,7 @@ struct mcu_t {
                        [AVR_TIMER_COMPB] = {
                                .r_ocr = OCR1BL,
                                .r_ocrh = OCR1BH,
-                               .com = { AVR_IO_REGBIT(TCCR1A, COM1B0), AVR_IO_REGBIT(TCCR1A, COM1B1) },
+                               .com = AVR_IO_REGBITS(TCCR1A, COM1B0, 0x3),
                                .com_pin = AVR_IO_REGBIT(PORTB, PB6),
                                .interrupt = {
                                        .enable = AVR_IO_REGBIT(TIMSK, OCIE1B),
@@ -281,7 +281,7 @@ struct mcu_t {
                        [AVR_TIMER_COMPC] = {
                                .r_ocr = OCR1CL,
                                .r_ocrh = OCR1CH,
-                               .com = { AVR_IO_REGBIT(TCCR1A, COM1C0), AVR_IO_REGBIT(TCCR1A, COM1C1) },
+                               .com = AVR_IO_REGBITS(TCCR1A, COM1C0, 0x3),
                                .com_pin = AVR_IO_REGBIT(PORTB, PB7), // same as timer2
                                .interrupt = {
                                        .enable = AVR_IO_REGBIT(ETIMSK, OCIE1C),
@@ -314,7 +314,7 @@ struct mcu_t {
                .comp = {
                        [AVR_TIMER_COMPA] = {
                                .r_ocr = OCR2,
-                               .com = { AVR_IO_REGBIT(TCCR2, COM20), AVR_IO_REGBIT(TCCR2, COM21) },
+                               .com = AVR_IO_REGBITS(TCCR2, COM20, 0x3),
                                .com_pin = AVR_IO_REGBIT(PORTB, PB7), // same as timer1C
                                .interrupt = {
                                        .enable = AVR_IO_REGBIT(TIMSK, OCIE2),
@@ -362,7 +362,7 @@ struct mcu_t {
                        [AVR_TIMER_COMPA] = {
                                .r_ocr = OCR3AL,
                                .r_ocrh = OCR3AH,       // 16 bits timers have two bytes of it
-                               .com = { AVR_IO_REGBIT(TCCR3A, COM3A0), AVR_IO_REGBIT(TCCR3A, COM3A1) },
+                               .com = AVR_IO_REGBITS(TCCR3A, COM3A0, 0x3),
                                .com_pin = AVR_IO_REGBIT(PORTE, PE3),
                                .interrupt = {
                                        .enable = AVR_IO_REGBIT(ETIMSK, OCIE3A),
@@ -373,7 +373,7 @@ struct mcu_t {
                        [AVR_TIMER_COMPB] = {
                                .r_ocr = OCR3BL,
                                .r_ocrh = OCR3BH,
-                               .com = { AVR_IO_REGBIT(TCCR3A, COM3B0), AVR_IO_REGBIT(TCCR3A, COM3B1) },
+                               .com = AVR_IO_REGBITS(TCCR3A, COM3B0, 0x3),
                                .com_pin = AVR_IO_REGBIT(PORTE, PE4),
                                .interrupt = {
                                        .enable = AVR_IO_REGBIT(ETIMSK, OCIE3B),
@@ -384,7 +384,7 @@ struct mcu_t {
                        [AVR_TIMER_COMPC] = {
                                .r_ocr = OCR3CL,
                                .r_ocrh = OCR3CH,
-                               .com = { AVR_IO_REGBIT(TCCR3A, COM3C0), AVR_IO_REGBIT(TCCR3A, COM3C1) },
+                               .com = AVR_IO_REGBITS(TCCR3A, COM3C0, 0x3),
                                .com_pin = AVR_IO_REGBIT(PORTE, PE5),
                                .interrupt = {
                                        .enable = AVR_IO_REGBIT(ETIMSK, OCIE3C),

diff --git a/simavr/cores/sim_megax4.h b/simavr/cores/sim_megax4.h
index 7af0bc6..6fd27ed 100644 (file)
--- a/simavr/cores/sim_megax4.h
+++ b/simavr/cores/sim_megax4.h
@@ -219,6 +219,8 @@ struct mcu_t SIM_CORENAME = {
                .comp = {
                        [AVR_TIMER_COMPA] = {
                                .r_ocr = OCR0A,
+                               .com = AVR_IO_REGBITS(TCCR0A, COM0A0, 0x3),
+                               .com_pin = AVR_IO_REGBIT(PORTB, 3),
                                .interrupt = {
                                        .enable = AVR_IO_REGBIT(TIMSK0, OCIE0A),
                                        .raised = AVR_IO_REGBIT(TIFR0, OCF0A),
@@ -227,6 +229,8 @@ struct mcu_t SIM_CORENAME = {
                        },
                        [AVR_TIMER_COMPB] = {
                                .r_ocr = OCR0B,
+                               .com = AVR_IO_REGBITS(TCCR0A, COM0B0, 0x3),
+                               .com_pin = AVR_IO_REGBIT(PORTB, 4),
                                .interrupt = {
                                        .enable = AVR_IO_REGBIT(TIMSK0, OCIE0B),
                                        .raised = AVR_IO_REGBIT(TIFR0, OCF0B),
@@ -272,6 +276,8 @@ struct mcu_t SIM_CORENAME = {
                        [AVR_TIMER_COMPA] = {
                                .r_ocr = OCR1AL,
                                .r_ocrh = OCR1AH,       // 16 bits timers have two bytes of it
+                               .com = AVR_IO_REGBITS(TCCR1A, COM1A0, 0x3),
+                               .com_pin = AVR_IO_REGBIT(PORTD, 5),
                                .interrupt = {
                                        .enable = AVR_IO_REGBIT(TIMSK1, OCIE1A),
                                        .raised = AVR_IO_REGBIT(TIFR1, OCF1A),
@@ -281,6 +287,8 @@ struct mcu_t SIM_CORENAME = {
                        [AVR_TIMER_COMPB] = {
                                .r_ocr = OCR1BL,
                                .r_ocrh = OCR1BH,
+                               .com = AVR_IO_REGBITS(TCCR1A, COM1B0, 0x3),
+                               .com_pin = AVR_IO_REGBIT(PORTD, 4),
                                .interrupt = {
                                        .enable = AVR_IO_REGBIT(TIMSK1, OCIE1B),
                                        .raised = AVR_IO_REGBIT(TIFR1, OCF1B),
@@ -314,6 +322,8 @@ struct mcu_t SIM_CORENAME = {
                .comp = {
                        [AVR_TIMER_COMPA] = {
                                .r_ocr = OCR2A,
+                               .com = AVR_IO_REGBITS(TCCR2A, COM2A0, 0x3),
+                               .com_pin = AVR_IO_REGBIT(PORTD, 7),
                                .interrupt = {
                                        .enable = AVR_IO_REGBIT(TIMSK2, OCIE2A),
                                        .raised = AVR_IO_REGBIT(TIFR2, OCF2A),
@@ -322,6 +332,8 @@ struct mcu_t SIM_CORENAME = {
                        },
                        [AVR_TIMER_COMPB] = {
                                .r_ocr = OCR2B,
+                               .com = AVR_IO_REGBITS(TCCR2A, COM2B0, 0x3),
+                               .com_pin = AVR_IO_REGBIT(PORTD, 6),
                                .interrupt = {
                                        .enable = AVR_IO_REGBIT(TIMSK2, OCIE2B),
                                        .raised = AVR_IO_REGBIT(TIFR2, OCF2B),

diff --git a/simavr/cores/sim_megax8.h b/simavr/cores/sim_megax8.h
index 4e153de..5575d77 100644 (file)
--- a/simavr/cores/sim_megax8.h
+++ b/simavr/cores/sim_megax8.h
@@ -183,7 +183,7 @@ struct mcu_t SIM_CORENAME = {
                .comp = {
                        [AVR_TIMER_COMPA] = {
                                .r_ocr = OCR0A,
-                               .com = { AVR_IO_REGBIT(TCCR0A, COM0A0), AVR_IO_REGBIT(TCCR0A, COM0A1) },
+                               .com = AVR_IO_REGBITS(TCCR0A, COM0A0, 0x3),
                                .com_pin = AVR_IO_REGBIT(PORTD, 6),
                                .interrupt = {
                                        .enable = AVR_IO_REGBIT(TIMSK0, OCIE0A),
@@ -193,7 +193,7 @@ struct mcu_t SIM_CORENAME = {
                        },
                        [AVR_TIMER_COMPB] = {
                                .r_ocr = OCR0B,
-                               .com = { AVR_IO_REGBIT(TCCR0A, COM0B0), AVR_IO_REGBIT(TCCR0A, COM0B1) },
+                               .com = AVR_IO_REGBITS(TCCR0A, COM0B0, 0x3),
                                .com_pin = AVR_IO_REGBIT(PORTD, 5),
                                .interrupt = {
                                        .enable = AVR_IO_REGBIT(TIMSK0, OCIE0B),
@@ -240,7 +240,7 @@ struct mcu_t SIM_CORENAME = {
                        [AVR_TIMER_COMPA] = {
                                .r_ocr = OCR1AL,
                                .r_ocrh = OCR1AH,       // 16 bits timers have two bytes of it
-                               .com = { AVR_IO_REGBIT(TCCR1A, COM1A0), AVR_IO_REGBIT(TCCR1A, COM1A1) },
+                               .com = AVR_IO_REGBITS(TCCR1A, COM1A0, 0x3),
                                .com_pin = AVR_IO_REGBIT(PORTB, 1),
                                .interrupt = {
                                        .enable = AVR_IO_REGBIT(TIMSK1, OCIE1A),
@@ -251,7 +251,7 @@ struct mcu_t SIM_CORENAME = {
                        [AVR_TIMER_COMPB] = {
                                .r_ocr = OCR1BL,
                                .r_ocrh = OCR1BH,
-                               .com = { AVR_IO_REGBIT(TCCR1A, COM1B0), AVR_IO_REGBIT(TCCR1A, COM1B1) },
+                               .com = AVR_IO_REGBITS(TCCR1A, COM1B0, 0x3),
                                .com_pin = AVR_IO_REGBIT(PORTB, 2),
                                .interrupt = {
                                        .enable = AVR_IO_REGBIT(TIMSK1, OCIE1B),
@@ -288,7 +288,7 @@ struct mcu_t SIM_CORENAME = {
                .comp = {
                        [AVR_TIMER_COMPA] = {
                                .r_ocr = OCR2A,
-                               .com = { AVR_IO_REGBIT(TCCR2A, COM2A0), AVR_IO_REGBIT(TCCR2A, COM2A1) },
+                               .com = AVR_IO_REGBITS(TCCR2A, COM2A0, 0x3),
                                .com_pin = AVR_IO_REGBIT(PORTB, 3),
                                .interrupt = {
                                        .enable = AVR_IO_REGBIT(TIMSK2, OCIE2A),
@@ -298,7 +298,7 @@ struct mcu_t SIM_CORENAME = {
                        },
                        [AVR_TIMER_COMPB] = {
                                .r_ocr = OCR2B,
-                               .com = { AVR_IO_REGBIT(TCCR2A, COM2B0), AVR_IO_REGBIT(TCCR2A, COM2B1) },
+                               .com = AVR_IO_REGBITS(TCCR2A, COM2B0, 0x3),
                                .com_pin = AVR_IO_REGBIT(PORTD, 3),
                                .interrupt = {
                                        .enable = AVR_IO_REGBIT(TIMSK2, OCIE2B),

diff --git a/simavr/cores/sim_tiny2313.c b/simavr/cores/sim_tiny2313.c
index 9ef4434..c78ebaa 100644 (file)
--- a/simavr/cores/sim_tiny2313.c
+++ b/simavr/cores/sim_tiny2313.c
@@ -124,6 +124,8 @@ static struct mcu_t {
                .comp = {
                        [AVR_TIMER_COMPA] = {
                                .r_ocr = OCR0A,
+                               .com = AVR_IO_REGBITS(TCCR0A, COM0A0, 0x3),
+                               .com_pin = AVR_IO_REGBIT(PORTB, 2),
                                .interrupt = {
                                        .enable = AVR_IO_REGBIT(TIMSK, OCIE0A),
                                        .raised = AVR_IO_REGBIT(TIFR, OCF0A),
@@ -132,6 +134,8 @@ static struct mcu_t {
                        },
                        [AVR_TIMER_COMPB] = {
                                .r_ocr = OCR0B,
+                               .com = AVR_IO_REGBITS(TCCR0A, COM0B0, 0x3),
+                               .com_pin = AVR_IO_REGBIT(PORTD, 5),
                                .interrupt = {
                                        .enable = AVR_IO_REGBIT(TIMSK, OCIE0B),
                                        .raised = AVR_IO_REGBIT(TIFR, OCF0B),
@@ -177,6 +181,8 @@ static struct mcu_t {
                        [AVR_TIMER_COMPA] = {
                                .r_ocr = OCR1AL,
                                .r_ocrh = OCR1AH,       // 16 bits timers have two bytes of it
+                               .com = AVR_IO_REGBITS(TCCR1A, COM1A0, 0x3),
+                               .com_pin = AVR_IO_REGBIT(PORTB, 3),
                                .interrupt = {
                                        .enable = AVR_IO_REGBIT(TIMSK, OCIE1A),
                                        .raised = AVR_IO_REGBIT(TIFR, OCF1A),
@@ -186,6 +192,8 @@ static struct mcu_t {
                        [AVR_TIMER_COMPB] = {
                                .r_ocr = OCR1BL,
                                .r_ocrh = OCR1BH,
+                               .com = AVR_IO_REGBITS(TCCR1A, COM1A0, 0x3),
+                               .com_pin = AVR_IO_REGBIT(PORTB, 4),
                                .interrupt = {
                                        .enable = AVR_IO_REGBIT(TIMSK, OCIE1B),
                                        .raised = AVR_IO_REGBIT(TIFR, OCF1B),

diff --git a/simavr/cores/sim_tinyx5.h b/simavr/cores/sim_tinyx5.h
index 60c323d..0610e57 100644 (file)
--- a/simavr/cores/sim_tinyx5.h
+++ b/simavr/cores/sim_tinyx5.h
@@ -127,6 +127,8 @@ struct mcu_t SIM_CORENAME = {
                .comp = {
                        [AVR_TIMER_COMPA] = {
                                .r_ocr = OCR0A,
+                               .com = AVR_IO_REGBITS(TCCR0A, COM0A0, 0x3),
+                               .com_pin = AVR_IO_REGBIT(PORTB, 0),
                                .interrupt = {
                                        .enable = AVR_IO_REGBIT(TIMSK, OCIE0A),
                                        .raised = AVR_IO_REGBIT(TIFR, OCF0A),
@@ -135,6 +137,8 @@ struct mcu_t SIM_CORENAME = {
                        },
                        [AVR_TIMER_COMPB] = {
                                .r_ocr = OCR0B,
+                               .com = AVR_IO_REGBITS(TCCR0A, COM0B0, 0x3),
+                               .com_pin = AVR_IO_REGBIT(PORTB, 1),
                                .interrupt = {
                                        .enable = AVR_IO_REGBIT(TIMSK, OCIE0B),
                                        .raised = AVR_IO_REGBIT(TIFR, OCF0B),
@@ -159,6 +163,8 @@ struct mcu_t SIM_CORENAME = {
                .comp = {
                        [AVR_TIMER_COMPA] = {
                                .r_ocr = OCR1A,
+                               .com = AVR_IO_REGBITS(TCCR1, COM1A0, 0x3),
+                               .com_pin = AVR_IO_REGBIT(PORTB, 1),
                                .interrupt = {
                                        .enable = AVR_IO_REGBIT(TIMSK, OCIE1A),
                                        .raised = AVR_IO_REGBIT(TIFR, OCF1A),
@@ -167,6 +173,8 @@ struct mcu_t SIM_CORENAME = {
                        },
                        [AVR_TIMER_COMPB] = {
                                .r_ocr = OCR1B,
+                               .com = AVR_IO_REGBITS(GTCCR, COM1B0, 0x3),
+                               .com_pin = AVR_IO_REGBIT(PORTB, 4),
                                .interrupt = {
                                        .enable = AVR_IO_REGBIT(TIMSK, OCIE1B),
                                        .raised = AVR_IO_REGBIT(TIFR, OCF1B),