[PATCH] ppc32: add dcr_base field to ocp_func_mal_data

Add dcr_base field to ocp_func_mal_data.  This is preparation step for the
new EMAC driver.

Signed-off-by: Eugene Surovegin <ebs@ebshome.net>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

diff --git a/arch/ppc/platforms/4xx/ibm405ep.c b/arch/ppc/platforms/4xx/ibm405ep.c
index 6d44567..093b28d 100644 (file)
--- a/arch/ppc/platforms/4xx/ibm405ep.c
+++ b/arch/ppc/platforms/4xx/ibm405ep.c
@@ -33,6 +33,7 @@ static struct ocp_func_mal_data ibm405ep_mal0_def = {
        .txde_irq       = 13,           /* TX Descriptor Error IRQ */
        .rxde_irq       = 14,           /* RX Descriptor Error IRQ */
        .serr_irq       = 10,           /* MAL System Error IRQ    */
+       .dcr_base       = DCRN_MAL_BASE /* MAL0_CFG DCR number */
 };
 OCP_SYSFS_MAL_DATA()
 

diff --git a/arch/ppc/platforms/4xx/ibm405gp.c b/arch/ppc/platforms/4xx/ibm405gp.c
index dfd7ef3..e570046 100644 (file)
--- a/arch/ppc/platforms/4xx/ibm405gp.c
+++ b/arch/ppc/platforms/4xx/ibm405gp.c
@@ -46,6 +46,7 @@ static struct ocp_func_mal_data ibm405gp_mal0_def = {
        .txde_irq       = 13,           /* TX Descriptor Error IRQ */
        .rxde_irq       = 14,           /* RX Descriptor Error IRQ */
        .serr_irq       = 10,           /* MAL System Error IRQ    */
+       .dcr_base       = DCRN_MAL_BASE /* MAL0_CFG DCR number */
 };
 OCP_SYSFS_MAL_DATA()
 

diff --git a/arch/ppc/platforms/4xx/ibm405gpr.c b/arch/ppc/platforms/4xx/ibm405gpr.c
index 01c8ccb..cd0d00d 100644 (file)
--- a/arch/ppc/platforms/4xx/ibm405gpr.c
+++ b/arch/ppc/platforms/4xx/ibm405gpr.c
@@ -42,6 +42,7 @@ static struct ocp_func_mal_data ibm405gpr_mal0_def = {
        .txde_irq       = 13,           /* TX Descriptor Error IRQ */
        .rxde_irq       = 14,           /* RX Descriptor Error IRQ */
        .serr_irq       = 10,           /* MAL System Error IRQ    */
+       .dcr_base       = DCRN_MAL_BASE /* MAL0_CFG DCR number */
 };
 OCP_SYSFS_MAL_DATA()
 

diff --git a/arch/ppc/platforms/4xx/ibm440ep.c b/arch/ppc/platforms/4xx/ibm440ep.c
index 284da01..4712de8 100644 (file)
--- a/arch/ppc/platforms/4xx/ibm440ep.c
+++ b/arch/ppc/platforms/4xx/ibm440ep.c
@@ -53,6 +53,7 @@ static struct ocp_func_mal_data ibm440ep_mal0_def = {
        .txde_irq       = 33,           /* TX Descriptor Error IRQ */
        .rxde_irq       = 34,           /* RX Descriptor Error IRQ */
        .serr_irq       = 32,           /* MAL System Error IRQ    */
+       .dcr_base       = DCRN_MAL_BASE /* MAL0_CFG DCR number */
 };
 OCP_SYSFS_MAL_DATA()
 

diff --git a/arch/ppc/platforms/4xx/ibm440gp.c b/arch/ppc/platforms/4xx/ibm440gp.c
index 27615ef..d926245 100644 (file)
--- a/arch/ppc/platforms/4xx/ibm440gp.c
+++ b/arch/ppc/platforms/4xx/ibm440gp.c
@@ -56,6 +56,7 @@ static struct ocp_func_mal_data ibm440gp_mal0_def = {
        .txde_irq       = 33,           /* TX Descriptor Error IRQ */
        .rxde_irq       = 34,           /* RX Descriptor Error IRQ */
        .serr_irq       = 32,           /* MAL System Error IRQ    */
+       .dcr_base       = DCRN_MAL_BASE /* MAL0_CFG DCR number */
 };
 OCP_SYSFS_MAL_DATA()
 

diff --git a/arch/ppc/platforms/4xx/ibm440gx.c b/arch/ppc/platforms/4xx/ibm440gx.c
index 1f38f42..956f45e 100644 (file)
--- a/arch/ppc/platforms/4xx/ibm440gx.c
+++ b/arch/ppc/platforms/4xx/ibm440gx.c
@@ -84,6 +84,7 @@ static struct ocp_func_mal_data ibm440gx_mal0_def = {
        .txde_irq       = 33,           /* TX Descriptor Error IRQ */
        .rxde_irq       = 34,           /* RX Descriptor Error IRQ */
        .serr_irq       = 32,           /* MAL System Error IRQ    */
+       .dcr_base       = DCRN_MAL_BASE /* MAL0_CFG DCR number */
 };
 OCP_SYSFS_MAL_DATA()
 

diff --git a/arch/ppc/platforms/4xx/ibm440sp.c b/arch/ppc/platforms/4xx/ibm440sp.c
index fa3e003..feb17e4 100644 (file)
--- a/arch/ppc/platforms/4xx/ibm440sp.c
+++ b/arch/ppc/platforms/4xx/ibm440sp.c
@@ -43,6 +43,7 @@ static struct ocp_func_mal_data ibm440sp_mal0_def = {
        .txde_irq       = 34,           /* TX Descriptor Error IRQ */
        .rxde_irq       = 35,           /* RX Descriptor Error IRQ */
        .serr_irq       = 33,           /* MAL System Error IRQ    */
+       .dcr_base       = DCRN_MAL_BASE /* MAL0_CFG DCR number */
 };
 OCP_SYSFS_MAL_DATA()
 

diff --git a/arch/ppc/platforms/4xx/ibmnp405h.c b/arch/ppc/platforms/4xx/ibmnp405h.c
index 4937cfb..a477a78 100644 (file)
--- a/arch/ppc/platforms/4xx/ibmnp405h.c
+++ b/arch/ppc/platforms/4xx/ibmnp405h.c
@@ -73,6 +73,7 @@ static struct ocp_func_mal_data ibmnp405h_mal0_def = {
        .txde_irq       = 46,           /* TX Descriptor Error IRQ */
        .rxde_irq       = 47,           /* RX Descriptor Error IRQ */
        .serr_irq       = 45,           /* MAL System Error IRQ    */
+       .dcr_base       = DCRN_MAL_BASE /* MAL0_CFG DCR number */
 };
 OCP_SYSFS_MAL_DATA()
 

diff --git a/include/asm-ppc/ibm_ocp.h b/include/asm-ppc/ibm_ocp.h
index 7fd4b6c..bd7656f 100644 (file)
--- a/include/asm-ppc/ibm_ocp.h
+++ b/include/asm-ppc/ibm_ocp.h
@@ -147,6 +147,7 @@ struct ocp_func_mal_data {
        int     txde_irq;       /* TX Descriptor Error IRQ */
        int     rxde_irq;       /* RX Descriptor Error IRQ */
        int     serr_irq;       /* MAL System Error IRQ    */
+       int     dcr_base;       /* MALx_CFG DCR number   */
 };
 
 #define OCP_SYSFS_MAL_DATA()                                           \
@@ -157,6 +158,7 @@ OCP_SYSFS_ADDTL(struct ocp_func_mal_data, "%d\n", mal, rxeob_irq)   \
 OCP_SYSFS_ADDTL(struct ocp_func_mal_data, "%d\n", mal, txde_irq)       \
 OCP_SYSFS_ADDTL(struct ocp_func_mal_data, "%d\n", mal, rxde_irq)       \
 OCP_SYSFS_ADDTL(struct ocp_func_mal_data, "%d\n", mal, serr_irq)       \
+OCP_SYSFS_ADDTL(struct ocp_func_mal_data, "%d\n", mal, dcr_base)       \
                                                                        \
 void ocp_show_mal_data(struct device *dev)                             \
 {                                                                      \
@@ -167,6 +169,7 @@ void ocp_show_mal_data(struct device *dev)                          \
        device_create_file(dev, &dev_attr_mal_txde_irq);                \
        device_create_file(dev, &dev_attr_mal_rxde_irq);                \
        device_create_file(dev, &dev_attr_mal_serr_irq);                \
+       device_create_file(dev, &dev_attr_mal_dcr_base);                \
 }
 
 /*