clocks = <&tegra_car TEGRA20_CLK_MPE>;
resets = <&tegra_car 60>;
reset-names = "mpe";
+
+ iommus = <&mc>;
};
vi@54080000 {
clocks = <&tegra_car TEGRA20_CLK_VI>;
resets = <&tegra_car 20>;
reset-names = "vi";
+
+ iommus = <&mc>;
};
epp@540c0000 {
clocks = <&tegra_car TEGRA20_CLK_EPP>;
resets = <&tegra_car 19>;
reset-names = "epp";
+
+ iommus = <&mc>;
};
isp@54100000 {
clocks = <&tegra_car TEGRA20_CLK_ISP>;
resets = <&tegra_car 23>;
reset-names = "isp";
+
+ iommus = <&mc>;
};
gr2d@54140000 {
clocks = <&tegra_car TEGRA20_CLK_GR2D>;
resets = <&tegra_car 21>;
reset-names = "2d";
+
+ iommus = <&mc>;
};
gr3d@54180000 {
clocks = <&tegra_car TEGRA20_CLK_GR3D>;
resets = <&tegra_car 24>;
reset-names = "3d";
+
+ iommus = <&mc>;
};
dc@54200000 {
nvidia,head = <0>;
+ iommus = <&mc>;
+
rgb {
status = "disabled";
};
nvidia,head = <1>;
+ iommus = <&mc>;
+
rgb {
status = "disabled";
};